LM2700Q

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SNVS794A – MARCH 2012 – REVISED MARCH 2013

Block Diagram

Detailed Description

The LM2700Q utilizes a PWM control scheme to regulate the output voltage over all load conditions. The

operation can best be understood referring to the block diagram and Figure 16 of the Operation section. At the

start of each cycle, the oscillator sets the driver logic and turns on the NMOS power device conducting current

compared with the summation of the SW voltage and the ramp compensation. The ramp compensation is used in

PWM architectures to eliminate the sub-harmonic oscillations that occur during duty cycles greater than 50%.

resets the driver logic turning off the NMOS power device. The inductor current then flows through the schottky

diode to the load and output capacitor, cycle 2 of Figure 16 (b). The NMOS power device is then set by the

oscillator at the end of the period and current flows through the inductor once again.

The LM2700Q has dedicated protection circuitry running during normal operation to protect the IC. The Thermal

Shutdown circuitry turns off the NMOS power device when the die temperature reaches excessive levels. The

UVP comparator protects the NMOS power device during supply power startup and shutdown to prevent

operation at voltages less than the minimum input voltage. The OVP comparator is used to prevent the output

voltage from rising at no loads allowing full PWM operation over all load conditions. The LM2700Q also features

a shutdown mode decreasing the supply current to 5µA.

These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam

during storage or handling to prevent electrostatic damage to the MOS gates.

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