TMP175, 75

SBOS288C

www.ti.com

11

FIGURE 7. Two-Wire Timing Diagram for Read Word Format.

Frame 1 Two-Wire Slave Address Byte

Frame 2 Pointer Register Byte

1

Start By

Master

ACK By

TMP175 or TMP75

ACK By

TMP175 or TMP75

Frame 3 Two-Wire Slave Address Byte

Frame 4 Data Byte 1 Read Register

Start By

Master

ACK By

TMP175 or TMP75

ACK By

Master

From

TMP175 or TMP75

19

1

9

19

1

9

SDA

SCL

0

0

1

R/W

0

0

0

0

0

0

P1

P0

…

…

…

…

SDA

(Continued)

SCL

(Continued)

SDA

(Continued)

SCL

(Continued)

10

0

1

00

0

00

0

R/W

D7

D6

D5

D4

D3

D2

D1

D0

Frame 5 Data Byte 2 Read Register

NOTE: Address Pins A0, A1, A2 = 0

Stop By

Master

ACK By

Master

From

TMP175 or TMP75

1

9

D7

D6

D5

D4

D3

D2

D1

D0

FIGURE 8. Timing Diagram for SMBus ALERT.

Frame 1 SMBus ALERT Response Address Byte

Frame 2 Slave Address Byte

Start By

Master

ACK By

TMP175 or TMP75

From

TMP175 or TMP75

NACK By

Master

Stop By

Master

19

1

9

SDA

SCL

ALERT

0

0

0

1

1

0

0

R/W

1

0

0

1

0

0

0

Status

NOTE: Address Pins A0, A1, A2 = 0