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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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TDC7201ZAXR датащи(PDF) 3 Page - Texas Instruments |
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TDC7201ZAXR датащи(HTML) 3 Page - Texas Instruments |
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3 / 50 page  1 2 3 4 5 E D C B A Not to scale STOP2 GND2 DOUT2 VREG2 CSB2 START2 TRIGG2 INTB2 DNC DIN CLOCK DNC DNC VDD2 DOUT1 STOP1 GND1 INTB1 VDD1 CSB1 START1 TRIGG1 ENABLE VREG1 SCLK 3 TDC7201 www.ti.com SNAS686 – MAY 2016 Product Folder Links: TDC7201 Submit Documentation Feedback Copyright © 2016, Texas Instruments Incorporated 5 Pin Configuration and Functions ZAX Package 25-Pin nFBGA Bottom View Pin Functions PIN TYPE DESCRIPTION NO. NAME A1 START1 Input START signal for TDC1 A2 TRIGG1 Output Trigger output signal for TDC1 A3 ENABLE Input Enable signal to TDC A4 VREG1 Output LDO output terminal for external decoupling cap A5 SCLK Input SPI clock B1 STOP1 Input STOP signal for TDC1 B2 GND1 Ground Ground B3 INTB1 Output Interrupt to MCU for TDC1, active low (open drain) B4 VDD1 Power Supply input B5 CSB1 Input SPI chip select for TDC1, active low C1 CLOCK Input Clock input to TDC C2 DNC — Do not connect C3 DNC — Do not connect C4 VDD2 Power Supply input C5 DOUT1 Output SPI data output for TDC1 D1 START2 Input START signal for TDC2 D2 TRIGG2 Output Trigger output signal for TDC2 D3 INTB2 Output Interrupt to MCU for TDC2, active low (open drain) D4 DNC — Do not connect D5 DIN Input SPI data input E1 STOP2 Input STOP signal for TDC2 E2 GND2 Ground Ground E3 DOUT2 Output SPI data output for TDC2 E4 VREG2 Output LDO output terminal for external decoupling cap E5 CSB2 Input SPI chip select for TDC2, active low |
Аналогичный номер детали - TDC7201ZAXR |
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Аналогичное описание - TDC7201ZAXR |
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