TL16PNP550A

ASYNCHRONOUS COMMUNICATIONS ELEMENT

WITH PLUGANDPLAY (PnP) AND AUTOFLOW CONTROL

SLLS190B − MARCH 1995 − REVISED MARCH 1996

8

POST OFFICE BOX 655303

POST OFFICE BOX 1443

auto-RTS (see Figure 1)

Auto-RTS data flow control originates in the receiver timing and control block (see functional block diagram)

and is linked to the programmed receiver FIFO trigger level. When the receiver FIFO level reaches a trigger level

of 1, 4, or 8, (see Figure 3), RTS is deasserted. With trigger levels of 1, 4, and 8, the sending ACE may send

an additional byte after the trigger level is reached (assuming the sending ACE has another byte to send)

because it may not recognize the deassertion of RTS until after it has begun sending the additional byte. RTS

is automatically reasserted once the receiver FIFO is emptied by reading the receiver buffer register.

When the trigger level is 14 (see Figure 4), RTS is deasserted after the first data bit of the sixteenth character

is present on the SIN line. RTS is reasserted when the receiver FIFO has at least one available byte space.

auto-CTS (see Figure 1)

The transmitter circuitry checks CTS before sending the next data byte. When CTS is active, it sends the next

byte. To stop the transmitter from sending the following byte, CTS must be released before the middle of the

last stop bit that is currently being sent (see Figure 2). The auto-CTS function reduces interrupts to the host

system. When flow control is enabled, changes of CTS level do not trigger host interrupts because the device

automatically controls its own transmitter. Without auto-CTS, the transmitter sends any data present in the

transmit FIFO and a receiver overrun error may result.

enabling autoflow control and auto-CTS

Autoflow control is enabled by setting modem control register bits 5 (autoflow enable or AFE) and 1 (RTS) to

1. Autoflow incorporates both auto-RTS and auto-CTS. If only auto-CTS is desired, bit 1 in the MCR should be

cleared (this assumes a control signal is driving CTS).

Start

Bits 0 − 7

Start

Bits 0 − 7

Start

Bits 0 − 7

Stop

Stop

Stop

SOUT

CTS

NOTE A: When CTS is low, the transmitter keeps sending serial data out. If CTS goes high before the middle of the last stop bit of the current

byte, the transmitter finishes sending the current byte but it does not send the next byte. When CTS goes from high to low, the transmitter

begins sending data again.

Figure 2. CTS Functional Timing Waveforms

The receiver FIFO trigger level can be set to 1, 4, 8, or 14 bytes. These are described in Figures 3 and 4.

Start

Byte N

Start

Byte N+1

Start

Byte

Stop

Stop

Stop

SIN

RTS

RD

(RD RBR)

12

N

N+1

NOTES: A. N = receiver FIFO trigger level (1, 4, or 8 bytes)

B. The two blocks in dashed lines cover the case where an additional byte is sent as described in the preceding auto-RTS section.

Figure 3. RTS Functional Timing Waveforms, Receiver FIFO Trigger Level = 1, 4, or 8 Bytes