поискавой системы для электроныых деталей |
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Si5348B-D-GM датащи(PDF) 7 Page - Silicon Laboratories |
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Si5348B-D-GM датащи(HTML) 7 Page - Silicon Laboratories |
7 / 54 page 3.5.1 Frequency Increment/Decrement Using Pin Controls (FINC, FDEC) Controlling the output frequency with pin controls is available. This feature involves asserting the FINC or FDEC pins to step (increment or decrement) the DSPLL’s output frequency. Both the step size and DCO selection (A, C, D) is made through the serial interface by writing to register bits. 0x0622 FSW_MASK_C DSPLL C LPF PD ÷ Mn_C Md_C Frequency Step Word + - DSPLL D LPF PD ÷ Mn_D Md_D Frequency Step Word + - 0x0723 FSW_MASK_D 0x0623 – 0x0629 0x0724 – 0x072A 0x001D FDEC FINC SDA/SDIO A1/SDO SCLK A0/CSb I2C_SEL SPI/ I2C Si5348 0x0422 FSW_MASK_A DSPLL A LPF PD ÷ Mn_A Md_A Frequency Step Word + - 0x0423 – 0x0429 Figure 3.3. Controlling the DCO Mode By Pin Control 3.5.2 Frequency Increment/Decrement Using the Serial Interface Controlling the DSPLL frequency through the serial interface is available. This feature involves asserting the FINC or FDEC bits to acti- vate the frequency change defined by the frequency step word. A set of mask bits selects the DSPLL(s) that is affect by the frequency change. Si5348 Rev D Data Sheet Functional Description silabs.com | Smart. Connected. Energy-friendly. Rev. 1.0 | 6 |
Аналогичный номер детали - Si5348B-D-GM |
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Аналогичное описание - Si5348B-D-GM |
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