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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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ADF4207 датащи(PDF) 10 Page - Analog Devices |
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ADF4207 датащи(HTML) 10 Page - Analog Devices |
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10 / 20 page  REV. 0 ADF4206/ADF4207/ADF4208 –10– DELAY ELEMENT U3 CLR2 Q2 D2 U2 CLR1 Q1 D1 CHARGE PUMP DOWN UP HI HI U1 R DIVIDER N DIVIDER CP OUTPUT R DIVIDER N DIVIDER CP CPGND VP Figure 5. PFD Simplified Schematic and Timing (In Lock) The PFD includes a delay element which sets the width of the antibacklash phase. The typical value for this is in the ADF4206 family is 3 ns. The pulse ensures that there is no deadzone in the PFD transfer function and minimizes phase noise and refer- ence spurs. MUXOUT AND LOCK DETECT The output multiplexer on the ADF4206 family allows the user to access various internal points on the chip. The state of MUXOUT is controlled by P3, P4, P11, and P12. See Tables III and V. Figure 6 shows the MUXOUT section in block diagram form. CONTROL MUX DVDD MUXOUT DGND RF2 ANALOG LOCK DETECT RF2 R COUNTER OUTPUT RF2 N COUNTER OUTPUT RF2/RF1 ANALOG LOCK DETECT RF1 R COUNTER OUTPUT RF1 N COUNTER OUTPUT RF1 ANALOG LOCK DETECT Figure 6. MUXOUT Circuit Lock Detect MUXOUT can be programmed for analog lock detect. The N-channel open-drain analog lock detect should be operated with an external pull-up resistor of 10 k Ω nominal. When lock has been detected it is high with narrow low-going pulses. INPUT SHIFT REGISTER The functional block diagram for the ADF4206 family is shown on Page 1. The main blocks include a 22-bit input shift register, a 14-bit R counter, and an 17-bit N counter, comprising a 6-bit A counter and an 11-bit B counter. Data is clocked into the 22-bit shift register on each rising edge of CLK. The data is clocked in MSB first. Data is transferred from the shift register to one of four latches on the rising edge of LE. The destination latch is determined by the state of the two control bits (C2, C1) in the shift register. These are the two LSBs DB1, DB0, as shown in the timing diagram of Figure 1. The truth table for these bits is shown in Table I. Table I. C2, C1 Truth Table Control Bits C2 C1 Data Latch 0 0 RF2 R Counter 0 1 RF2 AB Counter (and Prescaler Select) 1 0 RF1 R Counter 1 1 RF1 AB Counter (and Prescaler Select) |
Аналогичный номер детали - ADF4207 |
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Аналогичное описание - ADF4207 |
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