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LM1851 датащи(PDF) 4 Page - National Semiconductor (TI) |
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LM1851 датащи(HTML) 4 Page - National Semiconductor (TI) |
4 / 8 page Typical Performance Characteristics Average Trip Time vs Normal Fault Current Threshold vs RSET Fault Current Output Drive Current vs Pin 1 Saturation Voltage vs External Load Current IL Output Voltage TLH5177 – 4 Circuit Description (Refer to Block and Connection Diagram) The LM1851 operates from 26V as set by an internal shunt regulator D3 In the absence of a fault (Ife0) the feedback path status signal (VS) is correspondingly zero Under these conditions the capacitor discharge current I1 sits quies- cently at three times its threshold value ITH so that noise induced charge on the timing capacitor will be rapidly re- moved When a fault current If is induced in the secondary of the external sense transformer the operational amplifier A1 uses feedback to force a virtual ground at the input as it extracts If The presence of If during either half-cycle will cause VS to go high which in turn changes I1 from 3ITH to ITH Although ITH discharges the timing capacitor during both half-cycles of the line If only charges the capacitor during the half-cycle in which If exits pin 2 Thus during one half-cycle If–ITH charges the timing capacitor while during the other half-cycle ITH discharges it When the capacitor voltage reaches 175V the latch engages and turns off Q3 permitting I2 to drive the gate of an SCR 4 |
Аналогичный номер детали - LM1851 |
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Аналогичное описание - LM1851 |
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