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ADP7157ACPZ-04-R7 датащи(PDF) 5 Page - Analog Devices |
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ADP7157ACPZ-04-R7 датащи(HTML) 5 Page - Analog Devices |
5 / 24 page ADP7157 Data Sheet Rev. A | Page 4 of 23 Parameter Symbol Test Conditions/Comments Min Typ Max Unit UNDERVOLTAGE THRESHOLDS Input Voltage Rising UVLO RISE 2.22 2.29 V Falling UVLO FALL 1.95 2.02 V Hysteresis UVLO HYS 200 mV V REG THRESHOLDS 8 Rising VREGUVLO RISE 1.94 V Falling VREGUVLO FALL 1.60 V Hysteresis VREGUVLO HYS 185 mV EN INPUT PRECISION 2.3 V ≤ V IN ≤ 5.5 V EN Input Logic High EN HIGH 1.13 1.22 1.31 V Logic Low EN LOW 1.05 1.13 1.22 V Logic Hysteresis EN HYS 90 mV LEAKAGE CURRENT REF_SENSE I REF_SENSE_LKG 10 nA EN I EN_LKG EN = V IN or ground 0.01 1 µA 1 V OUT_MAX is the maximum output voltage of each version of the ADP7157. 2 Guaranteed by characterization, but not production tested. 3 This output voltage specification is for ADP7157-04 version. Table 10 provides a guide for selecting one of the four versions of the ADP7157 based on voltage range. 4 This specification is based on an endpoint calculation using 10 mA and 1.2 A loads. 5 Current-limit threshold is the current at which the output voltage drops to 90% of the specified typical value. For example, the current limit for a 3.0 V output voltage is the current that causes the output voltage to drop to 90% of 3.0 V or 2.7 V. 6 Dropout voltage is the input to output voltage differential when the input voltage is set to the nominal output voltage. Dropout applies only for output voltages above 2.3 V. 7 Start-up time is the time from the rising edge of V EN to VOUT, VREG, or VREF being at 90% of its nominal value. 8 The output voltage is disabled until the V REG UVLO rise threshold is crossed. The VREG output is disabled until the input voltage UVLO rising threshold is crossed. Table 3. Input and Output Capacitors, Recommended Specifications Parameter Symbol Test Conditions/Comments Min Typ Max Unit MINIMUM CAPACITANCE T A = −40°C to +125°C Input1 C IN 10.0 µF Regulator1 C REG 1.0 µF Output1 C OUT 10.0 µF Bypass C BYP 1.0 µF Reference C REF 1.0 µF CAPACITOR EFFECTIVE SERIES RESISTANCE (ESR) R ESR T A = −40°C to +125°C C REG, COUT, CIN, CREF 0.001 0.2 Ω C BYP 0.001 2.0 Ω 1 The minimum input, regulator, and output capacitances must be greater than 7.0 μF over the full range of operating conditions. The full range of operating conditions in the application must be considered during device selection to ensure that the minimum capacitance specification is met. X7R and X5R type capacitors are recommended, and Y5V and Z5U capacitors are not recommended for use with any LDO. |
Аналогичный номер детали - ADP7157ACPZ-04-R7 |
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Аналогичное описание - ADP7157ACPZ-04-R7 |
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