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LM2685 датащи(PDF) 6 Page - National Semiconductor (TI) |
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LM2685 датащи(HTML) 6 Page - National Semiconductor (TI) |
6 / 9 page Detailed Device Description The LM2685 CMOS charge pump voltage converter oper- ates as an input voltage doubler, +5V regulator and inverter for an input voltage in the range of +2.85V to +6.5V. It deliv- ers maximum load currents of 50mA and 15mA for the regu- lated +5V and the inverted output voltages respectively, with an operating current of only 800µA. It also has a typical shut- down current of 6µA. All these performance qualities make the LM2685 an ideal device for battery powered systems. The LM2685 has three main functional blocks: a voltage doubler, a low dropout (LDO) regulator, and a voltage in- verter. Figure 1 shows the LM2685 functional block diagram. Voltage Doubler The voltage doubler stage doubles the input voltage V IN, within the range of +2.85V to +5.4V. For V IN above 5.4V, the doubler shuts off and the input voltage is passed directly to V DBL via an internal power switch. The doubler contains four large CMOS switches which are switched in a sequence to double the input supply voltage. Figure 2 illustrates the voltage conversion scheme. When S2 and S4 are closed, C1 charges to the supply voltage V IN. During this time interval, switches S1 and S3 are open. In the next time interval, S2 and S4 are opened at the same time, S1 and S3 are closed, the sum of the input voltage V IN and the voltage across C1 gives the 2V In and the voltage across C2 gives the 2V IN at VDBL output. VDBL supplies the LDO regulator. It is recommended not to load V DBL when V05 has a load of 50mA. For proper operation, the sum of V DBL and V 05 loads must not be more than 50mA. The Schottky diode D1 is only needed for start-up. The inter- nal oscillator circuit uses the V DBL and GND pins. The volt- age across them must be larger than 1.8V to ensure the op- eration of the oscillator. During start-up, D1 is used to charge up the voltage at V DBL pin to start the oscillator; it also pro- tects the device from turning on its own parasitic diode and potentially latching up. The diode should have enough cur- rent carrying capability to change capacitor C3 at start-up, as well as a low forward voltage to prevent the internal parasitic diode from turning on. A Schottky diode like 1N5817 can be used for most applications. If the input ramp is less than 10V/ms, a smaller schottky diode like MBR0520LT1 can be used to reduce the circuit size. +5 LDO Regulator V DBL is the input to an LDO regulator that regulates it to a +5 output voltage at V 05.VPSW is tied to V05 through a series switch PSW. The LDO output capacitor (4.7µF Tantalum) may be tied to either V 05 or VPSW. Inverter From the V 05 output, a −5V output is created at VNEG by means of an inverting charge pump. This negative output is unregulated, meaning that it’s output will droop as the load current at V NEG increases. The inverter contains four large CMOS switches which are in a sequence to invert the input supply voltage. Figure 3 illustrates the voltage conversion scheme. When S1 and S3 are closed, C1 charges to the supply voltage V 05. During this time interval, switches S2 and S4 are open. In the second time interval, S1 and S3 are open;at the same time, S2 and S4 are closed, C1 is charging C2. After a number of cycles, the voltage cross C2 will be pumped to V 05. Since the anode of C2 is connected to ground, the output at the cathode of C2 equals −(V 05) when there is no load current. The output voltage drop when a load DS101100-3 FIGURE 1. Functional Block Diagram DS101100-4 FIGURE 2. Voltage Doubler Principle www.national.com 6 |
Аналогичный номер детали - LM2685 |
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Аналогичное описание - LM2685 |
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