932SQ426

CK420BQ DERIVATIVE SUPPORTING SRNS PCIE CLOCKING

IDT®

CK420BQ DERIVATIVE SUPPORTING SRNS PCIE CLOCKING

7

932SQ426

REV C 022916

Pin Descriptions (VFQFPN, cont.)

PIN #

PIN NAME

TYPE

DESCRIPTION

33

NS_SRC1C

OUT

Complementary clock of differential non-spreading SRC output. These are current mode outputs and

external series resistors and shunt resistors are required for termination. See Test Loads and

Recommended Terminations for specific values.

34

NS_SRC1T

OUT

True clock of differential non-spreading SRC output.

These are current mode outputs and external series

resistors and shunt resistors are required for termination. See Test Loads and Recommended Terminations

for specific values.

35

VDDNS

PWR 3.3V power for the Non-Spreading differential outputs outputs and logic

36

GNDNS

PWR Ground pin for non-spreading differential outputs and logic.

37

NS_SAS0C

OUT

Complementary clock of differentia non-spreading SAS output. These are current mode outputs and

external series resistors and shunt resistors are required for termination. See Test Loads and

Recommended Terminations for specific values.

38

NS_SAS0T

OUT

True clock of differential non-spreading SAS output. These are current mode outputs and external series

resistors and shunt resistors are required for termination. See Test Loads and Recommended Terminations

for specific values.

39

NS_SAS1C

OUT

Complementary clock of differentia non-spreading SAS output. These are current mode outputs and

external series resistors and shunt resistors are required for termination. See Test Loads and

Recommended Terminations for specific values.

40

NS_SAS1T

OUT

True clock of differential non-spreading SAS output. These are current mode outputs and external series

resistors and shunt resistors are required for termination. See Test Loads and Recommended Terminations

for specific values.

41

AVDD_NS_SAS

PWR 3.3V power for the non-spreading SAS/SRC PLL analog circuits.

42

GNDNS

PWR Ground pin for non-spreading differential outputs and logic.

43

CPU0C

OUT

Complementary clock of differential CPU output. These are current mode outputs and external series

resistors and shunt resistors are required for termination. See Test Loads and Recommended Terminations

for specific values.

44

CPU0T

OUT

True clock of differential CPU output. These are current mode outputs and external series resistors and

shunt resistors are required for termination. See Test Loads and Recommended Terminations for specific

values.

45

CPU1C

OUT

Complementary clock of differential CPU output. These are current mode outputs and external series

resistors and shunt resistors are required for termination. See Test Loads and Recommended Terminations

for specific values.

46

CPU1T

OUT

True clock of differential CPU output. These are current mode outputs and external series resistors and

shunt resistors are required for termination. See Test Loads and Recommended Terminations for specific

values.

47

VDDCPU

PWR 3.3V power for the CPU outputs and logic

48

GNDCPU

PWR Ground pin for CPU outputs and logic.

49

CPU2C

OUT

Complementary clock of differential CPU output. These are current mode outputs and external series

resistors and shunt resistors are required for termination. See Test Loads and Recommended Terminations

for specific values.

50

CPU2T

OUT

True clock of differential CPU output. These are current mode outputs and external series resistors and

shunt resistors are required for termination. See Test Loads and Recommended Terminations for specific

values.

51

CPU3C

OUT

Complementary clock of differential CPU output. These are current mode outputs and external series

resistors and shunt resistors are required for termination. See Test Loads and Recommended Terminations

for specific values.

52

CPU3T

OUT

True clock of differential CPU output. These are current mode outputs and external series resistors and

shunt resistors are required for termination. See Test Loads and Recommended Terminations for specific

values.

53

VDDCPU

PWR 3.3V power for the CPU outputs and logic

54

SMBDAT

I/O

Data pin of SMBUS circuitry, 5V tolerant

55

SMBCLK

IN

Clock pin of SMBUS circuitry, 5V tolerant

56

GND14

PWR Ground pin for 14MHz output and logic.

57

AVDD14

PWR Analog power pin for 14MHz PLL

58

VDD14

PWR Power pin for 14MHz output and logic

59

vREF14_3x/TEST_SE

L

I/O

14.318 MHz reference clock. 3X drive strength as default / TEST_SEL latched input to enable test mode.

Refer to Test Clarification Table. This pin has a weak (~120Kohm) internal pull down.

60

GND14

PWR Ground pin for 14MHz output and logic.

61

GNDXTAL

PWR Ground pin for Crystal Oscillator.

62

X1_25

IN

Crystal input, Nominally 25.00MHz.

63

X2_25

OUT Crystal output, Nominally 25.00MHz.

64

VDDXTAL

PWR 3.3V power for the crystal oscillator.