ISL22346WM datasheet(2/3 Pages) INTERSIL

номер детали	ISL22346WM

подробное описание детали	Controlled Baseline with One Wafer Fabrication Site and

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производитель	INTERSIL [Intersil Corporation]

домашняя страница	http://www.intersil.com/cda/home

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FN6624.1

November 11, 2011

Block Diagram

I2C

INTERFACE

VCC

RH0

RH1

RH2

RH3

GND

RL0

RL1

RL2

RL3

RW0

RW1

RW2

RW3

SCL

SDA

A0

A1

A2

WR3

WR2

WR1

WR0

SHDN

POWER-UP

INTERFACE,

CONTROL

AND STATUS

LOGIC

NON-

VOLATILE

REGISTERS

Pin Descriptions

TSSOP PIN

SYMBOL

DESCRIPTION

1

RH3

“High” terminal of DCP3

2

RL3

“Low” terminal of DCP3

3

RW3

“Wiper” terminal of DCP3

4

A2

Device address input for the I2C interface

5

SCL

Open drain I2C interface clock input

6

SDA

Open drain Serial data I/O for the I2C interface

7

GND

Device ground pin

8

RW2

“Wiper” terminal of DCP2

9

RL2

“Low” terminal of DCP2

10

RH2

“High” terminal of DCP2

11

RW1

“Wiper” terminal of DCP1

12

RL1

“Low” terminal of DCP1

13

RH1

“High” terminal of DCP1

14

A0

Device address input for the I2C interface

15

A1

Device address input for the I2C interface

16

VCC

Power supply pin

17

SHDN

Shutdown active low input

18

RH0

“High” terminal of DCP0

19

RL0

“Low” terminal of DCP0

20

RW0

“Wiper” terminal of DCP0

ISL22346WM

Аналогичный номер детали - ISL22346WM

производитель	номер детали	датащи	подробное описание детали
Intersil Corporation	ISL22346WM	101Kb / 3P	Low Noise, Low Power I2C® Bus, 128 Taps November 11, 2011
Renesas Technology Corp	ISL22346WM	206Kb / 3P	Quad Digitally Controlled Potentiometers (XDCP™) Low Noise, Low Power I2C Bus, 128 Taps November 11, 2011
Intersil Corporation	ISL22346WMVEP	99Kb / 3P	Low Noise, Low Power I2C짰 Bus, 128 Taps
Intersil Corporation	ISL22346WMVEP	101Kb / 3P	Low Noise, Low Power I2C® Bus, 128 Taps November 11, 2011
Renesas Technology Corp	ISL22346WMVEP	206Kb / 3P	Quad Digitally Controlled Potentiometers (XDCP™) Low Noise, Low Power I2C Bus, 128 Taps November 11, 2011

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