поискавой системы для электроныых деталей |
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IDT70V06S датащи(PDF) 14 Page - Integrated Device Technology |
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IDT70V06S датащи(HTML) 14 Page - Integrated Device Technology |
14 / 23 page 14 IDT70V06S/L High-Speed 3.3V 16K x 8 Dual-Port Static RAM Industrial and Commercial Temperature Ranges 2942 drw 12 tDW tAPS ADDR"A" tWC DATAOUT "B" MATCH tWP R/W"A" DATAIN "A" ADDR"B" tDH VALID (1) MATCH BUSY"B" tBDA VALID tBDD tDDD (3) tWDD tBAA Timing Waveform of Write with Port-To-Port Read and BUSY(2,4,5) (M/S = VIH) NOTES: 1. To ensure that the earlier of the two ports wins. tAPS is ignored for M/S = VIL (SLAVE). 2. CEL = CER = VIL 3. OE = VIL for the reading port. 4. If M/S = VIL(slave) then BUSY is input. Then for this example BUSY“A” = VIH and BUSY“B” input is shown above. 5. All timing is the same for left and right port. Port "A" may be either left or right port. Port "B" is the port opposite from Port "A". |
Аналогичный номер детали - IDT70V06S_15 |
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Аналогичное описание - IDT70V06S_15 |
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