ISL29034

9

FN8370.2

August 19, 2016

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Register Description

Following are detailed descriptions of the control registers related to

the operation of the ISL29034 ambient light sensor device. These

All the features of the device are controlled by the registers. The ADC

data can also be read. The following sections explain the details of

each register bit. All RESERVED bits are Intersil used bits ONLY. The

value of the reserved bit can change without notice.

Decimal to Hexadecimal Conversion

To convert decimal value to hexadecimal value, divide the decimal

number by 16, and write the remainder on the side as the least

significant digit. This process is continued by dividing the quotient by

16 and writing the remainder until the quotient is 0. When

performing the division, the remainders, which will represent the

hexadecimal equivalent of the decimal number, are written

beginning with the least significant digit (right) and each new digit is

written to the next most significant digit (the left) of the previous

digit. Consider the number 175 decimal.

Command-I Register (Address: 0x00)

The Command-I register consists three operation mode bits. The

default register value is 0x00 at power-on.

Command-I Register (Address: 0x0 Operation Mode Bits[7:5])

The ISL29034 has different operating modes. These modes are

selected by setting B7 to B5 bits on register address 0x00. The

device powers up on a disable mode. Table 5 on page 10 lists the

possible operating modes.

1 0 0 010 00

A

C

K

A

C

K

S

T

A

R

T

DEVICE ADDRESS

WRITE

ADDRESS BYTE

SIGNAL FROM

MASTER DEVICE

SIGNAL AT SDA

SIGNALS FROM

SLAVE DEVICE

A

C

K

S

T

O

P

DEVICE ADDRESS

READ

DATA BYTE

S

T

A

R

T

10 00 10 01

FIGURE 13. BYTE ADDRESS READ SEQUENCE

100 010 00

A

C

K

A

C

K

S

T

A

R

T

DEVICE

ADDRESS

WRITE

ADDRESS BYTE

SIGNAL FROM

MASTER DEVICE

SIGNAL AT SDA

SIGNALS FROM

SLAVE DEVICE

A

C

K

S

T

O

P

DEVICE

ADDRESS READ

DATA BYTE 1

S

T

A

R

T

100 010 01

A

C

K

DATA BYTE 2

A

C

K

DATA BYTE n

(n IS ANY INTEGER

GREATER THAN 1)

FIGURE 14. BURST READ SEQUENCE

TABLE 2. REGISTER MAP

NAME

REGISTER

ADDRESS

REGISTER BITS

DEFAULT

ACCESS

DEC

HEX

B7

B6

B5

B4

B3

B2

B1

B0

COMMAND-I

0

0x00

OP2

OP1

OP0

RESERVED

0x00

RW

COMMAND-II

1

0x01

RESERVED

RES1

RES0

RANGE1

RANGE0

0x00

RW

20x02

D7

D6

D5

D4

D3

D2

D1

D0

0x00

RO

3

0x03

D15

D14

D13

D12

D11

D10

D9

D8

0x00

RO

ID

15

0x0F

BOUT

RESERVED

1

0

1

RESERVED

1x101xxx

RW

TABLE 3. DECIMAL TO HEXADECIMAL

DIVISION

QUOTIENT

REMINDER

HEX NUMBER

175/16

10 = A

15 = F

0xAF

TABLE 4. COMMAND-I REGISTER ADDRESS

NAME

ADDR

(HEX)

REGISTER BITS

DFLT

(HEX)

B7

B6

B5 B4 B3 B2

B1

B0

COMMAND-I 0x00 OP2 OP1 OP0

RESERVED

0x00