SN74AUC1G125

SINGLE BUS BUFFER GATE

WITH 3-STATE OUTPUT

SCES382G – MARCH 2002 – REVISED JUNE 2003

3

POST OFFICE BOX 655303

recommended operating conditions (see Note 3)

MIN

MAX

UNIT

VCC

Supply voltage

0.8

2.7

V

V

High-level input voltage

VCC = 0.8 V

VCC

V

VIH

High-level input voltage

VCC = 1.1 V to 1.95 V

0.65

× VCC

V

IH

VCC = 2.3 V to 2.7 V

1.7

V

Low-level input voltage

VCC = 0.8 V

0

V

VIL

Low-level input voltage

VCC = 1.1 V to 1.95 V

0.35

× VCC

V

IL

VCC = 2.3 V to 2.7 V

0.7

VI

Input voltage

0

3.6

V

VO

Output voltage

0

VCC

V

I

High-level output current

VCC = 0.8 V

–0.7

mA

I

High-level output current

VCC = 1.1 V

–3

mA

IOH

High-level output current

VCC = 1.4 V

–5

mA

OH

VCC = 1.65 V

–8

VCC = 2.3 V

–9

I

Low-level output current

VCC = 0.8 V

0.7

mA

I

Low-level output current

VCC = 1.1 V

3

mA

IOL

Low-level output current

VCC = 1.4 V

5

mA

OL

VCC = 1.65 V

8

VCC = 2.3 V

9

t/ v

Input transition rise or fall rate

VCC = 0.8 V to 1.6 V

20

ns/V

∆t/∆v

Input transition rise or fall rate

VCC = 1.65 V to 1.95 V

10

ns/V

VCC = 2.3 V to 2.7 V

3

TA

Operating free-air temperature

–40

85

°C

NOTE 3: All unused inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report,

Implications of Slow or Floating CMOS Inputs, literature number SCBA004.