CDCM61004

SCAS871H – FEBRUARY 2009 – REVISED JANUARY 2016

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Table of Contents

9.2

Functional Block Diagram ....................................... 15

1

Features .................................................................. 1

9.3

Feature Description................................................. 16

2

Applications ........................................................... 1

9.4

Device Functional Modes........................................ 19

3

Description ............................................................. 1

10

Application and Implementation........................ 22

4

Revision History..................................................... 2

10.1

Application Information.......................................... 22

5

Description (Continued) ........................................ 4

10.2

Typical Application ................................................ 26

6

Pin Configuration and Functions ......................... 5

11

Power Supply Recommendations ..................... 28

7

Specifications......................................................... 7

11.1

Power Considerations ........................................... 28

7.1

Absolute Maximum Ratings ..................................... 7

11.2

Thermal Management ........................................... 29

7.2

ESD Ratings.............................................................. 7

11.3

Power-Supply Filtering .......................................... 29

7.3

Recommended Operating Conditions ....................... 7

12

Layout................................................................... 30

7.4

Thermal Information .................................................. 8

12.1

Layout Guidelines ................................................. 30

7.5

Electrical Characteristics........................................... 9

12.2

Layout Example .................................................... 30

7.6

Typical Output Phase Noise Characteristics ......... 10

13

Device and Documentation Support ................. 31

7.7

Typical Output Jitter Characteristics ...................... 11

13.1

Device Support...................................................... 31

7.8

Crystal Characteristics ............................................ 11

13.2

Community Resources.......................................... 31

7.9

Dissipation Ratings ................................................ 11

13.3

Trademarks ........................................................... 31

7.10

Typical Characteristics .......................................... 12

13.4

Electrostatic Discharge Caution ............................ 31

8

Parameter Measurement Information ................ 13

13.5

Glossary ................................................................ 31

9

Detailed Description ............................................ 15

14

Mechanical, Packaging, and Orderable

9.1

Overview ................................................................. 15

Information ........................................................... 31

4 Revision History

NOTE: Page numbers for previous revisions may differ from page numbers in the current version.

Changes from Revision G (May 2011) to Revision H

Page

•

Added ESD Ratings table, Feature Description section, Device Functional Modes, Application and Implementation

section, Power Supply Recommendations section, Layout section, Device and Documentation Support section, and

Mechanical, Packaging, and Orderable Information section. ................................................................................................ 1

•

Changed input capacitance, only typical. .............................................................................................................................. 6

•

Added Allowable Temperature Drift for Continuous PLL Lock parameter ............................................................................. 7

•

Changed on-chip load capacitance, only typical. ................................................................................................................. 11

•

Changed parisitic to parasitic. .............................................................................................................................................. 17

•

Added paragraph about temperature drift while locked. ..................................................................................................... 18

Changes from Revision F (February 2011) to Revision G

Page

•

Changed the On-Chip VCO section ..................................................................................................................................... 18

•

Changed Figure 15 ............................................................................................................................................................... 18

•

Moved the LVCMOS INPUT INTERFACE section prior to the Output Divider section........................................................ 18

Changes from Revision E (July 2010) to Revision F

Page

•

Changed Note 1 of the Pin Functions table From: Pullup and Pull-down see...To: Pullup refers to ..................................... 6

•

•

Changed the text of Configuring the PLL, deleted the last sentence................................................................................... 16

•

Changed the On-Chip VCO section ..................................................................................................................................... 18

•

Changed the Output Buffer section ...................................................................................................................................... 19

•

Changed values in row 24.75 of Table 3.............................................................................................................................. 19

•

Changed the power dissipation equation From: 610.5 mW – 4 × 50 mW = 41.7 mW To: 617.1 mW – 4 × 50 mW =

2

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