1

2

3

4

5

6

7

8

9

10

11

12

13

14

15

16

17

18

19

20

TPS51518

Thermal Pad

GSNS

V3

V2

V1

V0

BST

SW

DRVH

DRVL

V5IN

TPS51518

SLUSAO8

– DECEMBER 2011

www.ti.com

DEVICE INFORMATION

PIN DESCRIPTIONS

PIN

I/O

DESCRIPTION

No.

NAME

I

Supply input for high-side MOSFET driver (bootstrap terminal). Connect a capacitor from this pin to the SW

11

BST

pin. Internally connected to V5IN via the bootstrap MOSFET switch.

13

DRVH

O

High-side MOSFET gate driver output.

14

DRVL

O

Synchronous low-side MOSFET gate driver output.

10

EN

I

Enable input for the device. Support 3.3-V logic

17

GND

I

Combined AGND and PGND point. The positive on-resistance current sensing input.

Voltage sense return tied directly to GND sense point of the load. Tie to GND with a 10-

Ω resistor to close

1

GSNS

I

feedback if die sensing is used. Short to GND if remote sense is not used.

16

MODE

I

See Table 2.

7

PGOOD

O

PGOOD output. Connect pull-up resistor.

Program the startup using 10

µA and voltage transition time using 50 µA from an external capacitor via

19

SLEW

I

current source.

12

SW

I/O

18

TRIP

I

4700ppm/

°C.

5

V0

I

Voltage set-point programming resistor input, corresponding to 00

4

V1

I

Voltage set-point programming resistor input, corresponding to 01

3

V2

I

Voltage set-point programming resistor input, corresponding to 10

2

V3

I

Voltage set-point programming resistor input, corresponding to 11

15

V5IN

I

5-V power supply input for internal circuits and MOSFET gate drivers

Logic input for set-point voltage selector. Use in conjunction with VID1 pin to select among four set-point

8

VID0

I

reference voltages. Support 1-V and 3.3-V logic.

Logic input for set-point voltage selector. Use in conjunction with VID0 pin to select among four set-point

9

VID1

I

reference voltages. Support 1-V and 3.3-V logic.

6

VREF

O

2 V, 300-

µA voltage reference. Bypass to GND with a 1-µF ceramic capacitor.

20

VSNS

I

feedback if die sensing is used.

Thermal Pad

Connect directly to system GND plane with multiple vias.

6

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Copyright

© 2011, Texas Instruments Incorporated

Product Folder Link(s) :TPS51518