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GS9025ACTM датащи(PDF) 9 Page - Gennum Corporation |
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GS9025ACTM датащи(HTML) 9 Page - Gennum Corporation |
9 / 18 page GENNUM CORPORATION 522 - 75 - 00 9 Fig. 14 Typical Input Jitter Tolerance (Characterized) Fig. 15 Typical IJT vs. Temperature (VCC = 5.0V) (Characterized) DETAILED DESCRIPTION The GS9025A Serial Digital Receiver is a bipolar integrated circuit containing a built-in cable equalizer and reclocker. Serial digital signals are applied to either the analog SDI/SDI or digital DDI/DDI inputs. Signals applied to the SDI/SDI inputs are equalized and then passed to a multiplexer. Signals applied to the DDI/DDI inputs bypass the equalizer and go directly to the multiplexer. The analog/digital select pin (A/D) determines which signal is then passed to the reclocker. Packaged in a 44 pin MQFP, the receiver operates from a single 5V supply to data rates of 540Mb/s. Typical power consumption is 575mW. 1. CABLE EQUALIZER The automatic cable equalizer is designed to equalize serial digital data signals from 143Mb/s to 540Mb/s. The serial data signal is connected to the input pins (SDI/SDI) either differentially or single-ended. The input signal passes through a variable gain equalizing stage whose frequency response closely matches the inverse cable loss characteristic. In addition, the variation of the frequency response with control voltage imitates the variation of the inverse cable loss characteristic with cable length. The gain stage provides up to 40dB of gain at 200MHz which typically results in equalization of greater than 350m at 270Mb/s of Belden 8281 cable. The edge energy of the equalized signal is monitored by a detector circuit which produces an error signal corresponding to the difference between the desired edge energy and the actual edge energy. This error signal is integrated by an external differential AGC filter capacitor (AGC+/AGC-) providing a steady control voltage for the gain stage. As the frequency response of the gain stage is automatically varied by the application of negative feedback, the edge energy of the equalized signal is kept at a constant level which is representative of the original edge energy at the transmitter. The equalized signal is also DC restored, effectively restoring the logic threshold of the equalized signal to its corrective level irrespective of shifts due to AC coupling. 1-1. Signal Strength Indication/carrier Detect The GS9025A incorporates an analog signal strength indicator/carrier detect (SSI/CD) output indicating both the presence of a carrier and the amount of equalization applied to the signal. The voltage output of this pin versus cable length (signal strength) is shown in Figure 2 and Figure 16. With 0m of cable (800mV input signal levels), the SSI/CD output voltage is approximately 4.5V. As the cable length increases, the SSI/CD voltage decreases linearly providing accurate correlation between the SSI/CD voltage and cable length. Fig. 16 SSI/CD Voltage vs. Cable Length When the signal strength decreases to the level set at the "Carrier Detect Threshold Adjust" pin, the SSI/CD voltage goes to a logic "0" state (0.8 V) and can be used to drive 0 0.1 0.2 0.3 0.4 0.5 0.6 100 200 300 400 500 600 DATA RATE (Mb/s) TA = 0 to 70˚C, VCC = 4.75 to 5.25V 0.200 0.250 0.300 0.350 0.400 0.450 0.500 0.550 0.600 0 1020 3040 5060 70 TEMPERATURE (C˚) 143Mb/s 177Mb/s 270Mb/s 360Mb/s 540Mb/s 0 1 2 3 4 5 50 100 150 200 250 300 350 400 450 500 CABLE LENGTH (m) 0 CD_ADJ CONTROL RANGE |
Аналогичный номер детали - GS9025ACTM |
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Аналогичное описание - GS9025ACTM |
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