поискавой системы для электроныых деталей |
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CAT28LV64JI-15T датащи(PDF) 9 Page - Catalyst Semiconductor |
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CAT28LV64JI-15T датащи(HTML) 9 Page - Catalyst Semiconductor |
9 / 12 page CAT28LV64 9 Doc. No. 1010, Rev. D HARDWARE DATA PROTECTION The following is a list of hardware data protection features that are incorporated into the CAT28LV64. (1) VCC sense provides for write protection when VCC falls below 2.0V min. (2) A power on delay mechanism, tINIT (see AC characteristics), provides a 5 to 10 ms delay before a write sequence, after VCC has reached 2.40V min. (3) Write inhibit is activated by holding any one of OE low, CE high or WE high. (4) Noise pulses of less than 20 ns on the WE or CE inputs will not result in a write cycle. SOFTWARE DATA PROTECTION The CAT28LV64 features a software controlled data protection scheme which, once enabled, requires a data algorithm to be issued to the device before a write can be performed. The device is shipped from Catalyst with the software protection NOT ENABLED (the CAT28LV64 is in the standard operating mode). Figure 9. Write Sequence for Activating Software Data Protection Figure 10. Write Sequence for Deactivating Software Data Protection Note: (1) Write protection is activated at this point whether or not any more writes are completed. Writing to addresses must occur within tBLC Max., after SDP activation. 28LV64 F12 SOFTWARE DATA PROTECTION ACTIVATED (1) WRITE DATA: XX WRITE LAST BYTE TO LAST ADDRESS TO ANY ADDRESS AA ADDRESS: 1555 WRITE DATA: 55 ADDRESS: 0AAA WRITE DATA: A0 ADDRESS: 1555 WRITE DATA: WRITE DATA: AA ADDRESS: 1555 WRITE DATA: 55 ADDRESS: 0AAA WRITE DATA: 80 ADDRESS: 1555 WRITE DATA: AA ADDRESS: 1555 WRITE DATA: 55 ADDRESS: 0AAA WRITE DATA: 20 ADDRESS: 1555 |
Аналогичный номер детали - CAT28LV64JI-15T |
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Аналогичное описание - CAT28LV64JI-15T |
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