AD7152/AD7153

Data Sheet

Rev. A | Page 16 of 24

CAP SETUP REGISTERS

Address 0x0B for Channel 1

Address 0x0E Channel 2 (AD7152 Only)

Default Value 0x00

Table 10. CAP Setup Register Bit Map

Bit

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

Mnemonic

Range 1

Range 0

CAPDIFF

Unused

Unused

Unused

Unused

Unused

Default

0

0

0

0

0

0

0

0

Table 11. CAP Setup Register Bit Descriptions

Bit

Mnemonic

Description

7

Range 1

Capacitive input range and mode setup

6

Range 0

Range 1

Range 0

Capacitive Input Range

5

CAPDIFF

CAPDIFF = 1 (Differential Mode)

CAPDIFF = 0 (Single-Ended Mode)

0

0

±1 pF

2 pF

0

1

±0.25 pF

0.5 pF

1

0

±0.5 pF

0.25 pF

1

1

±2 pF

4 pF

4 to 0

N/A

These bits must be 0 for proper operation

CONFIGURATION REGISTER

Address Pointer 0x0F

Default Value 0x00

Table 12. Configuration Register Bit Map

Bit

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

Mnemonic

Unused

Unused

Unused

Ch1en

Ch2en

MD2

MD1

MD0

Default

0

0

0

0

0

0

0

0

Table 13. Configuration Register Bit Descriptions

Bit

Mnemonic

Description

7 to 5

N/A

These bits must be 0 for proper operation

4

Ch1en

Ch2en = 1 enables Channel 1 for single conversion, continuous conversion, or calibration

3

Ch2en

Ch2en = 1 enables Channel 2 for single conversion, continuous conversion, or calibration

2

MD2

Converter mode of operation setup

1

MD1

MD2

MD1

MD0

Mode

0

MD0

0

0

0

Idle

0

0

1

Continuous conversion

0

1

0

Single conversion

0

1

1

Power-down

1

0

0

N/A

1

0

1

Capacitance system offset calibration

1

1

0

Capacitance system gain calibration

1

1

1

N/A