STK11C48 datasheet(8/10 Pages) ETC

номер детали	STK11C48

подробное описание детали	2K x 8 nvSRAM QuantumTrap CMOS Nonvolatile Static RAM

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STK11C48

December 2002

8

Document Control # ML0003 rev 0.0

Internally, RECALL is a two-step procedure. First,

the SRAM data is cleared, and second, the nonvola-

tile information is transferred into the SRAM cells.

After the t

RECALL cycle time the SRAM will once again

be ready for READ and WRITE operations. The

RECALL

operation in no way alters the data in the

Nonvolatile Element cells. The nonvolatile data can

be recalled an unlimited number of times.

POWER-UP RECALL

During power up, or after any low-power condition

(V

CC < VRESET), an internal RECALL request will be

latched. When V

CC once again exceeds the sense

voltage of V

SWITCH, a RECALL cycle will automatically

be initiated and will take t

RESTORE to complete.

If the STK11C48 is in a WRITE state at the end of

power-up RECALL, the SRAM data will be corrupted.

To help avoid this situation, a 10K Ohm resistor

should be connected either between W and system

V

CC or between E and system VCC.

HARDWARE PROTECT

The STK11C48 offers hardware protection against

inadvertent STORE operation during low-voltage

conditions. When V

CC < VSWITCH, all software STORE

operations are inhibited.

LOW AVERAGE ACTIVE POWER

The STK11C48 draws significantly less current

when it is cycled at times longer than 50ns. Figure 2

shows the relationship between I

CC and READ cycle

time. Worst-case current consumption is shown for

both CMOS and TTL input levels (commercial tem-

perature range, V

CC = 5.5V, 100% duty cycle on chip

enable). Figure 3 shows the same relationship for

WRITE

cycles. If the chip enable duty cycle is less

than 100%, only standby current is drawn when the

chip is disabled. The overall average current drawn

by the STK11C48 depends on the following items:

1) CMOS vs. TTL input levels; 2) the duty cycle of

chip enable; 3) the overall cycle rate for accesses;

4) the ratio of READs to WRITEs; 5) the operating

temperature; 6) the Vcc level; and 7) I/O loading.

Figure 2: ICC (max) Reads

0

20

40

60

80

100

50

100

150

200

Cycle Time (ns)

TTL

CMOS

Figure 3: ICC (max) Writes

0

20

40

60

80

100

50

100

150

200

Cycle Time (ns)

TTL

CMOS

Аналогичный номер детали - STK11C48

производитель	номер детали	датащи	подробное описание детали
Simtek Corporation	STK11C48	368Kb / 10P	2K x 8 nvSRAM QuantumTrap??CMOS Nonvolatile Static RAM
	STK11C48-N25	368Kb / 10P	2K x 8 nvSRAM QuantumTrap??CMOS Nonvolatile Static RAM
	STK11C48-N25I	368Kb / 10P	2K x 8 nvSRAM QuantumTrap??CMOS Nonvolatile Static RAM
	STK11C48-N35	368Kb / 10P	2K x 8 nvSRAM QuantumTrap??CMOS Nonvolatile Static RAM
	STK11C48-N35I	368Kb / 10P	2K x 8 nvSRAM QuantumTrap??CMOS Nonvolatile Static RAM

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Аналогичное описание - STK11C48

производитель	номер детали	датащи	подробное описание детали
Simtek Corporation	STK10C48	429Kb / 12P	2K x 8 nvSRAM QuantumTrap??CMOS Nonvolatile Static RAM
	STK11C48	368Kb / 10P	2K x 8 nvSRAM QuantumTrap??CMOS Nonvolatile Static RAM
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Simtek Corporation	STK20C04	428Kb / 12P	512 x 8 nvSRAM QuantumTrap??CMOS Nonvolatile Static RAM
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List of Unclassifed Man...	STK14C88	386Kb / 13P	32K x 8 AutoStore nvSRAM QuantumTrap CMOS Nonvolatile Static RAM
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