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TPS2393 датащи(PDF) 7 Page - Texas Instruments

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номер детали TPS2393
подробное описание детали  FULL-FEATURED -48-V HOT SWAP POWER MANAGER
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производитель  TI [Texas Instruments]
домашняя страница  http://www.ti.com
Logo TI - Texas Instruments

TPS2393 датащи(HTML) 7 Page - Texas Instruments

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TPS2392
TPS2393
SLUS536C − AUGUST 2002 − REVISED AUGUST 2004
www.ti.com
7
PIN ASSIGNMENTS
ISENS: Current sense input. An external low-value resistor connected between this pin and −VIN is used to feed
back current magnitude information to the TPS2392 and TPS2393. There are two internal device thresholds
associated with the voltage at the ISENS pin. During ramp-up of the load’s input capacitance, or during other periods
of excessive demand, the HSPM acts to limit this voltage to 40 mV. Whenever the LCA is in current regulation mode,
the capacitor at FLTTIME is charged to activate the timer. If, when the LCA is driving to its supply rail, a fast-acting
fault such as a short-circuit, causes the ISENS voltage to exceed 100 mV (the overload threshold), the GATE pin
is pulled low rapidly, bypassing the fault timer.
OVLO: Voltage sense input for supply overvoltage lockout (OVLO) protection. Overvoltage protection can be
achieved by applying a divided down sample of the input supply voltage to this pin. In order to turn on gate drive to
the external FET, the OVLO pin must be below the 1.4-V typical threshold, while all other input qualifications are met.
If the OVLO pin is raised above this threshold, as with increasing supply voltage, the GATE output is pulled low,
interrupting the supply to the load. An internal 10-
µA pull-up is switched to this pin when the threshold is exceeded,
providing a mechanism for setting the amount of OVLO hysteresis along with the trip threshold.
PG: Open-drain, active-low indication of load power good condition. The TPS2392 and TPS2393 devices define
power good as the voltage at the DRAINSNS pin below the power good threshold, and the voltage at the IRAMP pin
being above 5 V. This assures that full programmed sourcing current is available to the load prior to declaring power
good, even with very slow current ramp rates. The additional protection prevents potential discharging of the module
bulk capacitance during load turn-on.
RTN: Positive supply input for the TPS2392 and TPS2393. For negative voltage systems, the supply pin connects
directly to the return node of the input power bus. Internal regulators step down the input voltage to generate the
various supply levels used by the TPS2392 and TPS2393.
UVLO: Voltage sense input for supply uvervoltage lockout (UVLO) protection. Undervoltage protection can be
achieved by applying a divided down sample of the input supply voltage to this pin. In order to turn on the gate drive
to the external FET, the UVLO pin must be above the 1.4-V typical threshold, while all other input qualifications are
met. If the UVLO pin drops below this threshold, as with decreasing supply voltage, the GATE output is pulled low,
interrupting the supply to the load. An internal 10-
µA pull−up is switched to this pin when the threshold is exceeded,
providing a mechanism for setting the amount of UVLO hysteresis along with the trip threshold.
For proper operation, a minimum 1500-pF capacitor, connected between the UVLO and −VIN pins, is required.
−VIN: Negative supply input and reference pin for the TPS2392 and TPS2393. This pin connects directly to the input
supply negative rail. The input and output pins and all internal circuitry are referenced to this pin, so it is essentially
the GND or VSS pin of the device.


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