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FM3565 датащи(PDF) 4 Page - Fairchild Semiconductor |
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FM3565 датащи(HTML) 4 Page - Fairchild Semiconductor |
4 / 7 page 4 www.fairchildsemi.com www.fairchildsemi.com FM3565 Rev. A.1 Reading from the Registers Data can be read from both of the internal registers. All reads are non-destructive and do not change the value in the register or the internal state of the device. When a start condition is received with a read request, both registers can be read out in the following sequence: (1) SOPRA: Serial Output Port Register A (2) SPORB: Serial Output Port Register B (3) PIPR: PORT-I Value If so desired, only the SOPRA register can be read. This is accomplished by issuing a stop command after the acknowledge bit for the first byte is read. If no stop is issued, the device will output the registers in the above sequence. Writing to the Registers Data is written to the SOPR registers through the serial port interface. When a write request is received with the Start Address, it is assumed that the intent is to write to the SOPR registers. The value placed in the least 6 significant bits of the register contain the new code to be placed in the SOPR A/B registers. The value of the two most significant bits must contain the address of the destina- tion register SOPRA or SOPRB. The internal non-volatile latch takes about 10 ms to update its data. Register Read Sequence Slave SOPRA SOPRB PIPR S Address R A Register A Register A Register A P S 1001110 1 A 00bbbbbb A 00bbbbbb A 00bbbbbb A P Register Write Sequence Slave SOPRx S Address W A Register A S S 1001110 0 A xxbbbbbb A S xx = Register Selection bits (MXSB and MXSA) xx = 00 selects SOPRA, 01 selects SOPRB Register Write Sequence using Repeated Start Condition Slave SOPRA Slave SOPRx S Address R A Register A S Address W A Register A P S 1001110 1 A 00bbbbbb A S 1001110 0 A xxbbbbbb A P Figure 4 This protocol uniquely defines START and STOP conditions. A START condition is defined as a HIGH to LOW transition of the SDA signal while SCL is HIGH. A STOP condition is defined as a LOW to HIGH transition of the SDA signal while SCL is HIGH. These are shown in Figure 2. Device Addressing The device uses 7-bit addressing. The address has been defined as 1001 110 if the ASEL input is ‘1’ and 0110 111 if the ASEL input is ‘0’. The address byte is the first byte of data sent after a start condition. This is the only address that this device will respond to. The device will not respond to the general call address 0000 000. SDA SCL START Condition STOP Condition OVRD MUXSEL A/B Mux_outputs 0 0 X all 0's 0 1 X Mux_inputs 1 0 0 From Non-volatile register (SOPRB) 1 0 1 From Non-volatile register (SOPRA) 1 1 X Mux_inputs Table 1. Multiplexer Control Options Multiplexer Logic The output multiplexer logic determines what value is actually output to the Y-port. The above table describes all the combinations. Serial Interface The IIC Interface is a standard slave interface. As such, the device will not generate its own clock. Data can be read from and written into the device. Commands for reading and writing the registers are generated by the Master. START and STOP Conditions |
Аналогичный номер детали - FM3565 |
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Аналогичное описание - FM3565 |
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