поискавой системы для электроныых деталей |
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CDCM1802RGTT датащи(PDF) 11 Page - Texas Instruments |
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CDCM1802RGTT датащи(HTML) 11 Page - Texas Instruments |
11 / 22 page CDCM1802 CLOCK BUFFER WITH PROGRAMMABLE DIVIDER, LVPECL I/O + ADDITIONAL LVCMOS OUTPUT SCAS759 − APRIL 2004 11 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 PARAMETER MEASUREMENT INFORMATION IN IN Y0 Y0 Y1 0.5 X VDD1 tPHLO tskLVCMOS(o) NOTES: A. Part-to-part skew, tsk(pp), is calculated as the greater of: − The difference between the fastest and the slowest tpd(LH)n across multiple devices − The difference between the fastest and the slowest tpd(HL)n across multiple devices B. Pulse skew, tsk(p), is calculated as the magnitude of the absolute time difference between the high-to-low (tpd(HL) and the low-to-high (tpd(LH)) propagation delays when a single switching input causes Y0 to switch, tsk(p) = | tpd(HL) − tpd(LH) |. Pulse skew is sometimes referred to as pulse width distortion or duty cycle skew. Figure 8. Waveforms for Calculation of tsk(o) and tsk(pp) |Yn*Yn| Yn Yn VOH VOL 80% 20% 0 V tr tf VOUT(pp) Figure 9. LVPECL Differential Output Voltage and Rise/Fall Time |
Аналогичный номер детали - CDCM1802RGTT |
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Аналогичное описание - CDCM1802RGTT |
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