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DLPC900 датащит (PDF) 36 Page - Texas Instruments

№ деталь DLPC900
подробность  DLPC900 Digital Controller for Advanced Light Control
скачать  83 Pages
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производитель  TI1 [Texas Instruments]
домашняя страница  http://www.ti.com
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DLPC900 Datasheet(HTML) 36 Page - Texas Instruments

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DADADDR_(3:0)
DADMODE_(1:0)
DADSEL_(1:0)
DADSTRB
tw(H)
todv-min
todv-max
50%
50%
36
DLPC900
DLPS037D – OCTOBER 2014 – REVISED MARCH 2019
www.ti.com
Product Folder Links: DLPC900
Submit Documentation Feedback
Copyright © 2014–2019, Texas Instruments Incorporated
(1)
DMD control signals are captured on the rising edge of DADSTRB within the DMD.
(2)
The DMD timing mode is controlled by the controller firmware.
6.14 DMD Interface Switching Characteristics
(1)
over recommended operating conditions, CL (min timing) = 5 pF, CL (max timing) = 50 pF (unless otherwise noted)
PARAMETER
FROM
TO
MIN
MAX
UNIT
DMD TIMING MODE 0 (2)
tw(H)
DMD strobe high pulse duration
N/A
DADSTRB
29
ns
tw(L)
DMD strobe low pulse duration
N/A
DADSTRB
29
ns
Todv-min
Output data valid window,
DADADDR_(3:0), DADMODE_(1:0), DADSEL_(1:0)
with respect to DADSTRB
DADADDR_(3:0)
DADMODE_(1:0)
DADSEL_(1:0)
DADSTRB
(1)
–27
ns
Todv-max
Output data valid window,
DADADDR_(3:0), DADMODE_(1:0), DADSEL_(1:0)
with respect to DADSTRB
DADADDR_(3:0)
DADMODE_(1:0)
DADSEL_(1:0)
DADSTRB
(1)
27
ns
DMD TIMING MODE 1 (2)
tw(H)
DMD strobe pulse duration
N/A
DADSTRB
14
ns
tw(L)
DMD strobe low pulse duration
N/A
DADSTRB
14
ns
Todv-min
Output data valid window,
DADADDR_(3:0), DADMODE_(1:0), DADSEL_(1:0)
with respect to DADSTRB
DADADDR_(3:0)
DADMODE_(1:0)
DADSEL_(1:0)
DADSTRB
(1)
–12
ns
Todv-max
Output data valid window,
DADADDR_(3:0), DADMODE_(1:0), DADSEL_(1:0)
with respect to DADSTRB
DADADDR_(3:0)
DADMODE_(1:0)
DADSEL_(1:0)
DADSTRB
(1)
12
ns
Figure 12. DMD Interface Timing


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