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FAN5182QSCX_NL датащи(PDF) 9 Page - Fairchild Semiconductor

номер детали FAN5182QSCX_NL
подробное описание детали  Adjustable Output 1, 2, or 3-Phase Synchronous Buck Controller
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производитель  FAIRCHILD [Fairchild Semiconductor]
домашняя страница  http://www.fairchildsemi.com
Logo FAIRCHILD - Fairchild Semiconductor

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FAN5182 Rev. 1.0.1
Theory of Operation
The FAN5182 combines a multi-loop, fixed frequency PWM con-
trol with multi-phase logic outputs for use in 1-, 2-, and 3-phase
synchronous buck point-of-load power supplies. Multi-phase
operation is important for producing the high current and low
voltage demanded by auxiliary supplies in desktop computers,
workstations, and servers. Handling high current in a single-
phase converter places high thermal stress on components
such as inductors and MOSFETs, therefore is not preferred.
The multi-loop control of the FAN5182 ensures a stable, high
performance topology for:
• Balancing current and thermal between/among phases
•Fast response at the lowest possible switching frequency and
output decoupling
• Reducing switching losses due to low frequency operation
• Tight line and load regulation
• Reducing output ripple due to multiphase cancellation
• Better noise immunity to facilitate PCB layout
Start-up Sequence
During start-up, the number of operational phases and their
phase relationship are determined by the internal circuitry that
monitors the PWM outputs. Normally, the FAN5182 operates as
a 3-phase PWM controller. Grounding the PWM3 pin programs
for 1- or 2-phase operation.
When the FAN5182 is enabled, the controller outputs a voltage
on PWM3 which is approximately 675mV. An internal compara-
tor checks this pin's voltage versus a threshold of 300mV. If the
PWM3 pin is grounded, it is below the threshold and the phase
3 is disabled. The output resistance of the PWM pin is approxi-
mately 5k
Ω during this detection period. Any external pull-down
resistance connected to the PWM pin should not be less than
25k
Ω to ensure proper operation. PWM1 and PWM2 are dis-
abled during the phase detection interval, which occurs during
the first two clock cycles of the internal oscillator. After this time,
if the PWM3 output is not grounded, the 5k
Ω resistance is dis-
connected and PWM3 switches between 0V and 5V. If the
PWM3 output is grounded, the controller will operate in 1 and/or
2-phase.
The PWMs output logic-level signals in order to interface with
external gate drivers such as the FAN5009. Since each phase is
able to operate close to 100% duty cycle, more than one PWM
output can be on at the same time.
Master Clock Frequency
The clock frequency of the FAN5182 is set by an external resis-
tor connected from the RT pin to ground. The frequency setting
follows the graph shown in Figure 2. To determine the frequency
per phase, divide the clock frequency by the number of phases
in use. One exception is single phase operation, in which the
clock frequency is set to be twice the single phase frequency.
Output Voltage Differential Sensing
The FAN5182 uses a differential low offset voltage error ampli-
fier to maintain ±2% differential sensing accuracy over tempera-
ture. The output voltage is sensed between the FB and FBRTN
pins. The power supply output connects to the FB pin through a
resistor divider, and the FBRTN pin should be connected
directly to the remote sense ground. The internal precision ref-
erence is referenced to FBRTN, which has a typical current of
100µA to allow accurate remote sensing. The internal error
amplifier compares the precision reference to the FB pin to reg-
ulate the output voltage.
Output Current Sensing
The FAN5182 uses a current sense amplifier (CSA) to monitor
the total output current for current limit detection. Sensing the
load current at the output gives the total average current being
delivered to the load, which is an inherently more accurate
method than peak current detection or sampling the current
across a sense element, such as the low-side MOSFET. This
amplifier can be configured several ways depending on the
objectives of the system design:
• Output inductor DCR sensing without a thermistor for lowest
cost
• Output inductor DCR sensing with a thermistor for improved
accuracy and moderate cost
• Discrete resistor sensing for the best accuracy
The positive input of the CSA is connected to the CSREF pin,
and the CSREF is tied to the power supply output. The inverting
input of the CSA, CSSUM, is the summing node of load current
sense through sensing elements (such as the switch node side
of the output inductors). The feedback resistor between
CSCOMP and CSSUM sets the gain of the amplifier, and a filter
capacitor is placed in parallel with this resistor. The gain of the
amplifier is programmable by adjusting the feedback resistor.
The current information is then given as the difference between
CSREF and CSCOMP. This difference signal is then used as a
differential input for the current limit comparator.
To provide the best accuracy for sensing current, the CSA is
designed to have low input offset voltage. The CSA gain is
determined by external resistors, so that it can be set very accu-
rately.
Current Control Loop and Thermal Balance
The FAN5182 adopts low side MOSFET RDSON sensing for
phase current balance. The sensed individual phase current is
combined with a fixed internal ramp, then compared with the
common voltage error amplifier output to balance phase cur-
rent. This current balance information is independent of the
average output current information used for current limit
described previously.
The magnitude of the internal ramp can be set to optimize tran-
sient response of the system. It also tracks the supply voltage
for better line regulation and transient response. A resistor con-
nected from the power supply input to the RAMPADJ pin deter-
mines the slope of the internal PWM ramp. Resistors RSW1
through RSW3 (see Figure 5) can be used for adjusting phase
current balance. It's recommended to put placeholders for these
resistors during the initial PCB layout, so that phase current bal-
ance fine adjustments can be made on bench if necessary.
To increase the current in any given phase, make RSW for that
phase larger (make RSW = 0Ω for the hottest phase as the start-
ing point). Increasing RSW to 500Ω could typically make a sub-
stantial increase in this particular phase current. Increase each
RSW value by small amounts to optimize phase current balance,
starting with the coolest phase first.


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