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TLIN1028-Q1 датащи(PDF) 20 Page - Texas Instruments

номер детали TLIN1028-Q1
подробное описание детали  TLIN1028-Q1 Automotive Local Interconnect Network (LIN) Transceiver with Integrated Voltage Regulator
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производитель  TI1 [Texas Instruments]
домашняя страница  http://www.ti.com
Logo TI1 - Texas Instruments

TLIN1028-Q1 датащи(HTML) 20 Page - Texas Instruments

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Simplified Transceiver
Filter
VSUP
LIN
RXD
TXD
VSUP/2
350 k
45 k
Ÿ
Receiver
Transmitter
with slope control
GND
1 k
VBAT
LIN Bus
VLIN_Dominant
VLIN_Recessive
VBattery
VSUP
t
VLIN_Bus
Voltage drop across the
diodes in the pullup path
VCC
20
TLIN1028-Q1
SLLSEX4 – AUGUST 2019
www.ti.com
Product Folder Links: TLIN1028-Q1
Submit Documentation Feedback
Copyright © 2019, Texas Instruments Incorporated
Feature Description (continued)
9.3.1.2 LIN Receiver Characteristics
The receiver characteristic thresholds are ratio-metric with the device supply pin according to the LIN
specification.
The receiver is capable of receiving higher data rates (> 100 kbps) than supported by LIN or SAEJ2602
specifications. This allows the TLIN1028-Q1 to be used for high speed downloads at the end-of-line production or
other applications. The actual data rate achievable depends on system time constants (bus capacitance and pull-
up resistance) and driver characteristics used in the system.
9.3.1.2.1
Termination
There is an internal pull-up resistor with a serial diode structure to VSUP, so no external pull-up components are
required for the LIN slave mode applications. An external pull-up resistor (1 k
Ω) and a series diode to VSUP must
be added when the device is used for master node applications as per the LIN specification.
Figure 20 shows a master node configuration and how the voltage levels are defined
Figure 20. Master Node Configuration with Voltage Levels
9.3.2 TXD (Transmit Input and Output)
TXD is the interface to the node processors’s LIN protocol controller that is used to control the state of the LIN
output. When TXD is low, the LIN output is dominant (near ground). When TXD is high, the LIN output is
recessive (near VSUP). See Figure 20. The TXD input structure is compatible with processors with 3.3 V and 5 VI
and VO. TXD has an internal pull-up resistor. The LIN bus is protected from being stuck dominant through a
system failure driving TXD low through the dominant state time-out timer.
9.3.3 RXD (Receive Output)
RXD is the interface to the processors LIN protocol controller, which reports the state of the LIN bus voltage. LIN
recessive (near VSUP) is represented by a high level on the RXD and LIN dominant (near ground) is represented
by a low level on the RXD pin. The RXD output structure is an open-drain output stage. This allows the device to
be used with 3.3 V and 5 VI/O processors. If the processors RXD pin does not have an integrated pull-up, an
external pull-up resistor to the processors I and O supply voltage is required. In standby mode, the RXD pin is
driven low to indicate a wake up request from the LIN bus. When going from normal mode to standby mode the
RXD pin is released and pulled up to the voltage rail the external pull-up resistor is connected. It is pulled low if a
wake event takes place.
9.3.4 VSUP (Supply Voltage)
VSUP is the power supply pin. VSUP is connected to the battery through an external reverse battery-blocking
diode.


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