54AC11027, 74AC11027

TRIPLE 3-INPUT POSITIVE-NOR GATES

SCAS019A – JULY 1987 – REVISED APRIL 1993

POST OFFICE BOX 655303

Copyright

2–1

PCB Layout

Minimize High-Speed Switching Noise

CMOS) 1-

µm Process

at 125

°C

Small-Outline Packages, Ceramic Chip

Carriers, and Standard Plastic and Ceramic

300-mil DIPs

description

These devices contain three independent 3-input

NOR gates. They perform the Boolean functions

Y = A+B+C or Y = A

S B S C in positive logic.

The 54AC11027 is characterized for operation

over the full military temperature range of – 55

°C

to 125

°C. The 74AC11027 is characterized for

operation from – 40

°C to 85°C.

FUNCTION TABLE

(each gate)

INPUTS

OUTPUT

A

B

C

Y

H

X

X

L

X

HX

L

X

XH

L

L

L

L

H

logic diagram (positive logic)

1Y

2

1A

1

1Y

1B

1C

16

15

2

1

1A

16

1B

15

1C

2A

14

2Y

2B

2C

11

10

3

3A

9

3Y

3B

3C

8

7

6

2Y

3

14

2A

11

2B

10

2C

3Y

6

9

3A

8

3B

7

3C

≥ 1

† This symbol is in accordance with ANSI/IEEE Std 91-1984

and IEC Publication 617-12.

Pin numbers shown are for the D, J, and N packages.

3

2

1 20 19

9 10 11 12 13

4

5

6

7

8

18

17

16

15

14

1C

1B

NC

1A

1Y

54AC11027 . . . FK PACKAGE

(TOP VIEW)

1

2

3

4

5

6

7

8

16

15

14

13

12

11

10

9

1A

1Y

2Y

GND

GND

3Y

3C

3B

1B

1C

2A

2B

2C

3A

54AC11027 ...J PACKAGE

74AC11027 ...D OR N PACKAGE

(TOP VIEW)

NC – No internal connection

2C

3A

NC

3B

3C

EPIC is a trademark of Texas Instruments Incorporated.

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of Texas Instruments

standard warranty. Production processing does not necessarily include

testing of all parameters.