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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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FIN12AC датащи(PDF) 8 Page - Fairchild Semiconductor |
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FIN12AC датащи(HTML) 8 Page - Fairchild Semiconductor |
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8 / 21 page  Preliminary www.fairchildsemi.com 8 PLL Circuitry The CKREF input signal is used to provide a reference to the PLL. The PLL will generate internal timing signals capable of transferring data at 14 times the incoming CKREF signal. The output of the PLL is a Bit Clock that is used to serialize the data. The bit clock is also sent source synchronously with the serial data stream. There are two ways to disable the PLL. The PLL can be disabled by entering the Mode 0 state. (S1 S2 0). The PLL will disable immediately upon detecting a LOW on both the S1 and S2 signals. When any of the other modes are entered by asserting either S1 or S2 HIGH and by pro- viding a CKREF signal the PLL will power-up and goes through a lock sequence. You must wait specified number of clock cycles prior to capturing valid data into the parallel port. An alternate way of powering down the PLL is by stopping the CKREF signal either HIGH or LOW. Internal circuitry detects the lack of transitions and shuts the PLL and serial I/O down. Internal references will not however be disabled allowing for the PLL to power-up and re-lock in a lesser number of clock cycles than when exiting Mode 0. When a transition is seen on the CKREF signal the PLL will once again be reactivated. Passing a Word Clock For some applications it is desirable to pass a word clock through the deserializer to the serializer and output it as a reference clock for another device. (See Figure ) This can be done under the following conditions: 1. The application mode is unidirectional only. 2. The master word clock is generated on the same side of the cable as the deserializer. To implement pass through functionality on the deserial- izer: 1. DIRI LOW 2. CKREF LOW 3. Word clock should be connected to the STROBE. 4. This will pass the STROBE signal out the CKSO port. To implement pass through functionality on the serializer: 1. Connect CKSO of the deserializer to CKSI of the serial- izer 2. CKSI passes the signal to CKP 3. CKP must be connected to CKREF If the word clock being passed through the serializer stops then the serializer must be placed in the reset mode (MODE 0) and restarted before the CKSI signal will again pass through to CKP. If CKREF of the deserializer is running then a high speed bit clock will be passed across the flip instead of STROBE. This bit clock will be used as the clock source by the serial- izer provided that no CKREF signal exists on the serializer. |
Аналогичный номер детали - FIN12AC |
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Аналогичное описание - FIN12AC |
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