поискавой системы для электроныых деталей |
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LC3564CT-70U датащи(PDF) 10 Page - Sanyo Semicon Device |
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LC3564CT-70U датащи(HTML) 10 Page - Sanyo Semicon Device |
10 / 11 page No. 6635-10/11 LC3564CM, CT-55U/70U Parameter Symbol Conditions Ratings Unit min typ max Data retention supply voltage VDR VCE2 ≤ 0.2 V or 2.0 5.5 µA VCE1 ≥ VCC – 0.2 V, VCE2 ≥ VCC – 0.2 V VCC = 3V, VCE2 ≤ 0.2 V, Ta ≤ 70°C 0.8 µA Data retention supply current ICCDR or VCE1 ≥ VCC – 0.2 V, VCE2 ≥ VCC – 0.2 V Ta ≤ 85°C 2.5 Chip enable setup time tCDR 0 ns Chip enable hold time tR tRC* ns Data Retention Characteristics at Ta = –40 to +85°C Note *: tRC is the read cycle time. Note *:In 5-V operation: 4.5 V In 3-V operation: 2.7 V Data Retention Waveforms (1): CE1 Control Notes on Circuit Design When actually design a circuit using these devices, take the following points into consideration and design the circuit so that none of the maximum rating items are ever exceeded. • Variations in the supply voltage • Variations in the electrical characteristics of components such as semiconductor devices, resistors, and capacitors. • Ambient temperature • Variations in input and clock signals • Possible application of abnormal pulses Also, these devices must be operated within the ranges stipulated in the allowable operating ranges. If CMOS IC input pins are left open, intermediate potential input voltages may occur leading to incorrect operation due to through currents or other phenomenon. Applications must handle unused input pins appropriately. tCDR Data retention mode VCE1 ≥ VCC–0.2V tR VCC VCCL VIH VDR VCE1 GND A13517 * tCDR Data retention mode VCE2 ≤ 0.2V tR VCC VCCL VCE2 VDR VIL GND A13518 * Data Retention Waveforms (2): CE2 Control |
Аналогичный номер детали - LC3564CT-70U |
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Аналогичное описание - LC3564CT-70U |
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