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AM29LV640MT датащи(PDF) 6 Page - SPANSION

номер детали AM29LV640MT
подробное описание детали  64 Megabit (4 M x 16-Bit/8 M x 8-Bit) MirrorBit-TM 3.0 Volt-only Boot Sector Flash Memory
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Am29LV640MT/B
February 12, 2004
ADV ANCE
I N FO RMAT I O N
TABLE OF CONTENTS
Product Selector Guide . . . . . . . . . . . . . . . . . . . . . 5
Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Connection Diagrams . . . . . . . . . . . . . . . . . . . . . . 6
Pin Description. . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Ordering Information . . . . . . . . . . . . . . . . . . . . . . . 9
Device Bus Operations . . . . . . . . . . . . . . . . . . . . 10
Table 1. Device Bus Operations .....................................................10
Word/Byte Configuration ........................................................ 10
Requirements for Reading Array Data ................................... 10
Page Mode Read .................................................................... 11
Writing Commands/Command Sequences ............................ 11
Write Buffer ............................................................................. 11
Accelerated Program Operation ............................................. 11
Autoselect Functions .............................................................. 11
Standby Mode ........................................................................ 11
Automatic Sleep Mode ........................................................... 12
RESET#: Hardware Reset Pin ............................................... 12
Output Disable Mode .............................................................. 12
Table 2. Am29LV640MT Top Boot Sector Architecture ..................12
Table 3. Am29LV640MB Bottom Boot Sector Architecture .............15
Autoselect Mode..................................................................... 18
Table 4. Autoselect Codes, (High Voltage Method) .......................18
Sector Group Protection and Unprotection ............................. 19
Table 5. Am29LV640MT Top Boot Sector Protection .....................19
Table 6. Am29LV640MB Bottom Boot Sector Protection ................19
Write Protect (WP#) ................................................................ 20
Temporary Sector Group Unprotect ....................................... 20
Figure 1. Temporary Sector Group Unprotect Operation................ 20
Figure 2. In-System Sector Group Protect/Unprotect Algorithms ... 21
SecSi (Secured Silicon) Sector Flash Memory Region .......... 22
Table 7. SecSi Sector Contents ......................................................22
Figure 3. SecSi Sector Protect Verify.............................................. 23
Hardware Data Protection ...................................................... 23
Low VCC Write Inhibit ............................................................ 23
Write Pulse “Glitch” Protection ............................................... 23
Logical Inhibit .......................................................................... 23
Power-Up Write Inhibit ............................................................ 23
Common Flash Memory Interface (CFI) . . . . . . . 23
Table 9. System Interface String......................................................24
Command Definitions . . . . . . . . . . . . . . . . . . . . . 26
Reading Array Data ................................................................ 26
Reset Command ..................................................................... 27
Autoselect Command Sequence ............................................ 27
Enter SecSi Sector/Exit SecSi Sector Command Sequence .. 27
Word/Byte Program Command Sequence ............................. 27
Unlock Bypass Command Sequence ..................................... 28
Write Buffer Programming ...................................................... 28
Accelerated Program .............................................................. 29
Figure 4. Write Buffer Programming Operation............................... 30
Figure 5. Program Operation .......................................................... 31
Program Suspend/Program Resume Command Sequence ... 31
Figure 6. Program Suspend/Program Resume............................... 32
Chip Erase Command Sequence ........................................... 32
Sector Erase Command Sequence ........................................ 32
Figure 7. Erase Operation............................................................... 33
Erase Suspend/Erase Resume Commands ........................... 34
Command Definitions ............................................................. 35
Table 12. Command Definitions (x16 Mode, BYTE# = V
IH) ............ 35
Table 13. Command Definitions (x8 Mode, BYTE# = V
IL)............... 36
Write Operation Status . . . . . . . . . . . . . . . . . . . . . 37
DQ7: Data# Polling ................................................................. 37
Figure 8. Data# Polling Algorithm .................................................. 37
RY/BY#: Ready/Busy#............................................................ 38
DQ6: Toggle Bit I .................................................................... 38
Figure 9. Toggle Bit Algorithm........................................................ 39
DQ2: Toggle Bit II ................................................................... 39
Reading Toggle Bits DQ6/DQ2 ............................................... 39
DQ5: Exceeded Timing Limits ................................................ 40
DQ3: Sector Erase Timer ....................................................... 40
DQ1: Write-to-Buffer Abort ..................................................... 40
Table 14. Write Operation Status ................................................... 40
Absolute Maximum Ratings. . . . . . . . . . . . . . . . . 41
Figure 10. Maximum Negative Overshoot Waveform ................... 41
Figure 11. Maximum Positive Overshoot Waveform ..................... 41
Operating Ranges . . . . . . . . . . . . . . . . . . . . . . . . . 41
DC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . 42
Test Conditions. . . . . . . . . . . . . . . . . . . . . . . . . . . 43
Figure 12. Test Setup.................................................................... 43
Table 15. Test Specifications ......................................................... 43
Key to Switching Waveforms. . . . . . . . . . . . . . . . 43
Figure 13. Input Waveforms and
Measurement Levels...................................................................... 43
AC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . 44
Read-Only Operations ........................................................... 44
Figure 14. Read Operation Timings ............................................... 44
Figure 15. Page Read Timings ...................................................... 45
Hardware Reset (RESET#) .................................................... 46
Figure 16. Reset Timings ............................................................... 46
Erase and Program Operations .............................................. 47
Figure 17. Program Operation Timings.......................................... 48
Figure 18. Accelerated Program Timing Diagram .......................... 48
Figure 19. Chip/Sector Erase Operation Timings .......................... 49
Figure 20. Data# Polling Timings (During Embedded Algorithms). 50
Figure 21. Toggle Bit Timings (During Embedded Algorithms)...... 51
Figure 22. DQ2 vs. DQ6................................................................. 51
Temporary Sector Unprotect .................................................. 52
Figure 23. Temporary Sector Group Unprotect Timing Diagram ... 52
Figure 24. Sector Group Protect and Unprotect Timing Diagram .. 53
Alternate CE# Controlled Erase and Program Operations ..... 54
Figure 25. Alternate CE# Controlled Write (Erase/Program)
Operation Timings.......................................................................... 55
Erase And Programming Performance. . . . . . . . 56
Latchup Characteristics . . . . . . . . . . . . . . . . . . . . 56
TSOP Pin and BGA Package Capacitance . . . . . 56
Data Retention. . . . . . . . . . . . . . . . . . . . . . . . . . . . 57
Physical Dimensions . . . . . . . . . . . . . . . . . . . . . . 58
TS 048—48-Pin Standard Pinout Thin Small Outline Package
(TSOP) ................................................................................... 58
FBE063—63-Ball Fine-pitch Ball Grid Array (FBGA)
12 x 11 mm Package .............................................................. 59
LAA064—64-Ball Fortified Ball Grid Array (FBGA)
13 x 11 mm Package .............................................................. 60
Revision Summary . . . . . . . . . . . . . . . . . . . . . . . . 61


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