поискавой системы для электроныых деталей
  Russian  ▼
ALLDATASHEETRU.COM

X  

GS8160Z36BGT-200IV датащи(PDF) 11 Page - GSI Technology

номер детали GS8160Z36BGT-200IV
подробное описание детали  18Mb Pipelined and Flow Through Synchronous NBT SRAM
Download  22 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
производитель  GSI [GSI Technology]
домашняя страница  http://www.gsitechnology.com
Logo GSI - GSI Technology

GS8160Z36BGT-200IV датащи(HTML) 11 Page - GSI Technology

Back Button GS8160Z36BGT-200IV Datasheet HTML 7Page - GSI Technology GS8160Z36BGT-200IV Datasheet HTML 8Page - GSI Technology GS8160Z36BGT-200IV Datasheet HTML 9Page - GSI Technology GS8160Z36BGT-200IV Datasheet HTML 10Page - GSI Technology GS8160Z36BGT-200IV Datasheet HTML 11Page - GSI Technology GS8160Z36BGT-200IV Datasheet HTML 12Page - GSI Technology GS8160Z36BGT-200IV Datasheet HTML 13Page - GSI Technology GS8160Z36BGT-200IV Datasheet HTML 14Page - GSI Technology GS8160Z36BGT-200IV Datasheet HTML 15Page - GSI Technology Next Button
Zoom Inzoom in Zoom Outzoom out
 11 / 22 page
background image
GS8160ZxxBT-xxxV
Preliminary
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
Rev: 1.01 5/2006
11/22
© 2004, GSI Technology
Burst Cycles
Although NBT RAMs are designed to sustain 100% bus bandwidth by eliminating turnaround cycle when there is transition from
read to write, multiple back-to-back reads or writes may also be performed. NBT SRAMs provide an on-chip burst address
generator that can be utilized, if desired, to further simplify burst read or write implementations. The ADV control pin, when
driven high, commands the SRAM to advance the internal address counter and use the counter generated address to read or write
the SRAM. The starting address for the first cycle in a burst cycle series is loaded into the SRAM by driving the ADV pin low, into
Load mode.
Burst Order
The burst address counter wraps around to its initial state after four addresses (the loaded address and three more) have been
accessed. The burst sequence is determined by the state of the Linear Burst Order pin (LBO). When this pin is low, a linear burst
sequence is selected. When the RAM is installed with the LBO pin tied high, Interleaved burst sequence is selected. See the tables
below for details.
Mode Pin Functions
Mode Name
Pin Name
State
Function
Burst Order Control
LBO
L
Linear Burst
H
Interleaved Burst
Output Register Control
FT
L
Flow Through
H or NC
Pipeline
Power Down Control
ZZ
L or NC
Active
H
Standby, IDD = ISB
Note:
There is a pull-up device on the FT pin and a pull-down device on the ZZ pin, so this input pin can be unconnected and the chip will operate in
the default states as specified in the above table.
Note:
The burst counter wraps to initial state on the 5th clock.
Note:
The burst counter wraps to initial state on the 5th clock.
Linear Burst Sequence
A[1:0] A[1:0] A[1:0] A[1:0]
1st address
00
01
10
11
2nd address
01
10
11
00
3rd address
10
11
00
01
4th address
11
00
01
10
Interleaved Burst Sequence
A[1:0] A[1:0] A[1:0] A[1:0]
1st address
00
01
10
11
2nd address
01
00
11
10
3rd address
10
11
00
01
4th address
11
10
01
00
Burst Counter Sequences
BPR 1999.05.18


Аналогичный номер детали - GS8160Z36BGT-200IV

производительномер деталидатащиподробное описание детали
logo
GSI Technology
GS8160Z36BGT-200I GSI-GS8160Z36BGT-200I Datasheet
597Kb / 23P
   18Mb Pipelined and Flow Through Synchronous NBT SRAM
GS8160Z36BGT-200IT GSI-GS8160Z36BGT-200IT Datasheet
597Kb / 23P
   18Mb Pipelined and Flow Through Synchronous NBT SRAM
More results

Аналогичное описание - GS8160Z36BGT-200IV

производительномер деталидатащиподробное описание детали
logo
GSI Technology
GS8162Z18BB-V GSI-GS8162Z18BB-V Datasheet
1Mb / 33P
   18Mb Pipelined and Flow Through Synchronous NBT SRAM
GS8162Z72C GSI-GS8162Z72C Datasheet
1Mb / 31P
   18Mb Pipelined and Flow Through Synchronous NBT SRAM
GS8162Z72CC-V GSI-GS8162Z72CC-V Datasheet
1Mb / 27P
   18Mb Pipelined and Flow Through Synchronous NBT SRAM
GS8160Z18CT GSI-GS8160Z18CT Datasheet
575Kb / 23P
   18Mb Pipelined and Flow Through Synchronous NBT SRAM
GS8161Z18 GSI-GS8161Z18 Datasheet
939Kb / 36P
   18Mb Pipelined and Flow Through Synchronous NBT SRAM
GS8160Z18T GSI-GS8160Z18T Datasheet
616Kb / 24P
   18Mb Pipelined and Flow Through Synchronous NBT SRAM
GS8160ZV18CT GSI-GS8160ZV18CT Datasheet
565Kb / 22P
   18Mb Pipelined and Flow Through Synchronous NBT SRAM
GS8161Z18BT-V GSI-GS8161Z18BT-V Datasheet
1Mb / 35P
   18Mb Pipelined and Flow Through Synchronous NBT SRAM
GS8162Z18BB GSI-GS8162Z18BB Datasheet
1Mb / 34P
   18Mb Pipelined and Flow Through Synchronous NBT SRAM
GS8161Z18B GSI-GS8161Z18B Datasheet
863Kb / 37P
   18Mb Pipelined and Flow Through Synchronous NBT SRAM
More results


Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22


датащи скачать

Go To PDF Page


ссылки URL




Конфиденциальность
ALLDATASHEETRU.COM
Вашему бизинису помогли Аллдатащит?  [ DONATE ] 

Что такое Аллдатащит   |   реклама   |   контакт   |   Конфиденциальность   |   обмен ссыками   |   поиск по производителю
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com