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74F3038 датащи(PDF) 2 Page - NXP Semiconductors

номер детали 74F3038
подробное описание детали  Quad 2-input NAND 30 ohm line driver open collector
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производитель  PHILIPS [NXP Semiconductors]
домашняя страница  http://www.nxp.com
Logo PHILIPS - NXP Semiconductors

74F3038 датащи(HTML) 2 Page - NXP Semiconductors

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Philips Semiconductors
Product specification
74F3038
Quad 2-input NAND 30
Ω line driver (open collector)
2
1998 May 21
853-0022 19433
FEATURES
30Ω line driver
160mA output drive capability
High speed
Facilitates incident wave switching
3nh lead inductance each on V
CC and GND when both side pins
are used
DESCRIPTION
The 74F3038 is a high current Open-Collector Line Driver
composed of four 2-input NAND gates. It has been designed to deal
with the transmission line effects of PC boards which appear when
fast edge rates are used.
The 74F3038 can sink 160mA with a VCC as low as 4.5V. This
guarantees incident wave switching with VOL not more than 0.8V
while driving impedances as low as 30
Ω. This is applicable with any
combination of outputs using continuous duty.
The AC specifications for the 74F3038 were determined using the
standard FAST load for open-collector parts of 50pF capacitance, a
500
Ω pull-up resistor and a 500Ω pull-down resistor. (See Test
Circuit).
Reducing the load resistors to 100
Ω will decrease the tPLH
propagation delay by approximately 50% while increasing tPHL only
slightly. The graph of typical propagation delay versus load resistor
(see AC Characteristics section for Graph) shows a spline fit curve
from four measured data points, RL = 30Ω, RL = 100Ω, RL = 300Ω,
and RL = 500Ω.
PIN CONFIGURATION
16
15
14
13
12
11
10
7
6
5
4
3
2
1
9
8
SF00570
D0a
D0b
Q0
GND
GND
Q1
D1a
D1b
Q2
D2b
D2a
VCC
VCC
D3a
D3b
Q3
TYPE
TYPICAL
PROPAGATION
DELAY
TYPICAL
SUPPLY CURRENT
(TOTAL)
74F3038
6.0ns
17mA
ORDERING INFORMATION
DESCRIPTION
COMMERCIAL RANGE
VCC = 5V ±10%,
Tamb = 0°C to +70°C
PACKAGE
DRAWING
NUMBER
16-pin Plastic DIP
N74F3038N
SOT38-4
16-pin Plastic SOL
N74F3038D
SOT162-1
INPUT AND OUTPUT LOADING AND FAN-OUT TABLE
PINS
DESCRIPTION
74F(U.L.)
HIGH/LOW
LOAD VALUE
HIGH/LOW
Dna, Dnb
Data inputs
1.0/1.0
20
µA/0.6mA
Qn
Data outputs
OC/266
OC/160mA
NOTE: One (1.0) FAST unit load is defined as: 20
µA in the High state and 0.6mA in the Low state. OC = Open Collector.
LOGIC SYMBOL
D0a
D0b D1a
D2a D2b D3a D3b
D1a
Q0
Q1
Q2 Q3
36
9
16
1
2
7
8
10
11
14
15
VCC = Pin 12,13
GND = Pin 4, 5
SF00571
IEC/IEEE SYMBOL
1
2
7
8
10
11
14
15
&
SF00572
3
6
9
16


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