Philips Semiconductors

Product specification

74F569

4-bit bidirectional binary synchronous counter (3-State)

1996 Jan 05

4

CET

SF01059

TC

CP

CET

TC

CET

TC

CET

TC

CET

TC

COUNT

CP

TO ALL STAGES

Figure 1. Multistage Counter with Ripple Carry

CET

SF01061

TC

CP

CET

TC

CEP

CET

TC

CEP

CET

TC

CEP

CET

CEP

COUNT

CP

TO ALL STAGES

LOW

Figure 2. Multistage Counter with Look-Ahead Carry

STATE DIAGRAM

0

123

4

5

6

7

8

9

10

11

12

13

14

15

COUNT DOWN

COUNT UP

SF01058

CC FUNCTION TABLE

INPUTS

OUTPUT

SR

PE

CEP

CET

TC*

CP

CC

L

X

X

X

X

X

H

X

L

X

X

X

X

H

X

X

H

X

X

X

H

X

X

X

H

X

X

H

X

X

X

X

H

X

H

H

H

L

L

L

*= TC is generated internally

H = High voltage level

L = Low voltage level

X = Don’t care

=

Low Pulse

FUNCTION TABLE

INPUTS

OPERATING MODE

MR

SR

PE

CEP

CET

U/D

CP

OPERATING MODE

L

X

X

X

X

X

X

Asynchronous reset

h

l

X

X

X

X

↑

Synchronous reset

h

h

l

X

X

X

↑

Parallel load

h

h

h

l

l

h

↑

Count Up (increment)

h

h

h

l

l

l

↑

Count Down (decrement)

h

H

H

H

X

X

X

Hold (do nothing)

h

H

H

X

H

X

X

Hold (do nothing)

H = High voltage level

h = High voltage level one setup time prior to the Low-to-High clock transition

L = Low voltage level

l

= Low voltage level one setup time prior to the Low-to-High clock transition

X = Don’t care

↑ = Low-to-High clock transition