поискавой системы для электроныых деталей |
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SN74AUP1G98YZPR датащи(PDF) 2 Page - Texas Instruments |
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SN74AUP1G98YZPR датащи(HTML) 2 Page - Texas Instruments |
2 / 16 page SN74AUP1G98 LOW POWER CONFIGURABLE MULTIPLEFUNCTION GATE SCES506B − NOVEMBER 2003 − REVISED AUGUST 2004 2 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 description/ordering information (continued) NanoStar and NanoFree package technology is a major breakthrough in IC packaging concepts, using the die as the package. This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down. ORDERING INFORMATION TA PACKAGE† ORDERABLE PART NUMBER TOP-SIDE MARKING‡ NanoStar − WCSP (DSBGA) 0.23-mm Large Bump − YEP Tape and reel SN74AUP1G98YEPR _ _ _HR_ −40 °C to 85°C NanoFree − WCSP (DSBGA) 0.23-mm Large Bump − YZP (Pb-free) Tape and reel SN74AUP1G98YZPR _ _ _HR_ SOT (SOT-23) − DBV Tape and reel SN74AUP1G98DBVR H98_ SOT (SC-70) − DCK Tape and reel SN74AUP1G98DCKR HR_ † Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at www.ti.com/sc/package. ‡ DBV/DCK: The actual top-side marking has one additional character that designates the assembly/test site. YEP/YZP: The actual top-side marking has three preceding characters to denote year, month, and sequence code, and one following character to designate the assembly/test site. Pin 1 identifier indicates solder-bump composition (1 = SnPb, • = Pb-free). FUNCTION TABLE INPUTS OUTPUT C B A OUTPUT Y L L L H L LH H L HL L L HH L H L L H H LH L H HL H H H H L logic diagram (positive logic) 3 1 6 C B A 4 Y |
Аналогичный номер детали - SN74AUP1G98YZPR |
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Аналогичное описание - SN74AUP1G98YZPR |
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