поискавой системы для электроныых деталей
  Russian  ▼
ALLDATASHEETRU.COM

X  

SN74V283-10GGM датащи(PDF) 4 Page - Texas Instruments

номер детали SN74V283-10GGM
подробное описание детали  819218, 1638418, 3276818, 65536 횞 18 3.3-V CMOS FIRST-IN, FIRST-OUT MEMORIES
Download  52 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
производитель  TI [Texas Instruments]
домашняя страница  http://www.ti.com
Logo TI - Texas Instruments

SN74V283-10GGM датащи(HTML) 4 Page - Texas Instruments

  SN74V283-10GGM Datasheet HTML 1Page - Texas Instruments SN74V283-10GGM Datasheet HTML 2Page - Texas Instruments SN74V283-10GGM Datasheet HTML 3Page - Texas Instruments SN74V283-10GGM Datasheet HTML 4Page - Texas Instruments SN74V283-10GGM Datasheet HTML 5Page - Texas Instruments SN74V283-10GGM Datasheet HTML 6Page - Texas Instruments SN74V283-10GGM Datasheet HTML 7Page - Texas Instruments SN74V283-10GGM Datasheet HTML 8Page - Texas Instruments SN74V283-10GGM Datasheet HTML 9Page - Texas Instruments Next Button
Zoom Inzoom in Zoom Outzoom out
 4 / 52 page
background image
SN74V263, SN74V273, SN74V283, SN74V293
8192
× 18, 16384 × 18, 32768 × 18, 65536 × 18
3.3-V CMOS FIRST-IN, FIRST-OUT MEMORIES
SCAS669D – JUNE 2001 – REVISED FEBRUARY 2003
4
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
functional block diagram
Write-Control
Logic
RAM Array
8192
× 18 or 16384 × 9
16384
× 18 or 32768 × 9
32768
× 18 or 65536 × 9
65536
× 18 or 131072 × 9
Offset
Register
Input
Register
Flag
Logic
Read Pointer
Read-Control Logic
Output
Register
Write
Pointer
Control
Logic
Reset
Logic
BE
IP
MRS
WEN
WCLK
D0–Dn (
×9 or ×18)
SEN
HF
PAE
EF/OR
PAF
FF/IR
Q0–Qn (
×9 or ×18)
OE
REN
RCLK
Bus
Configuration
IW
OW
PRS
LD
FSEL1
FSEL0
PFM
FWFT/SI
RM
RT
description (continued)
For applications requiring more data-storage capacity than a single FIFO can provide, the FWFT timing mode
permits depth expansion by chaining FIFOs in series (i.e., the data outputs of one FIFO are connected to the
corresponding data inputs of the next). No external logic is required.
These FIFOs have five flag pins: empty flag or output ready (EF/OR), full flag or input ready (FF/IR), half-full
flag (HF), programmable almost-empty flag (PAE), and programmable almost-full flag (PAF). The IR and OR
functions are selected in FWFT mode. The EF and FF functions are selected in standard mode. HF, PAE, and
PAF always are available for use, regardless of timing mode.
PAE and PAF can be programmed independently to switch at any point in memory. Programmable offsets
determine the flag-switching threshold and can be loaded by parallel or serial methods. Eight default offset
settings also are provided, so that PAE can be set to switch at a predefined number of locations from the empty
boundary. The PAF threshold also can be set at similar predefined values from the full boundary. The default
offset values are set during master reset by the state of FSEL0, FSEL1, and LD.
For serial programming, SEN, together with LD, loads the offset registers via the serial input (SI) on each rising
edge of WCLK. For parallel programming, WEN, together with LD, loads the offset registers via Dn on each
rising edge of WCLK. REN, together with LD, can read the offsets in parallel from Qn on each rising edge of
RCLK, regardless of whether serial or parallel offset loading has been selected.


Аналогичный номер детали - SN74V283-10GGM

производительномер деталидатащиподробное описание детали
logo
Texas Instruments
SN74V283-10PZA TI1-SN74V283-10PZA Datasheet
824Kb / 52P
[Old version datasheet]   3.3-V CMOS FIRST-IN, FIRST-OUT MEMORIES
More results

Аналогичное описание - SN74V283-10GGM

производительномер деталидатащиподробное описание детали
logo
Texas Instruments
SN74V3640 TI-SN74V3640 Datasheet
725Kb / 50P
[Old version datasheet]   1024 횞 36, 2048 횞 36, 4096 횞 36, 8192 횞 36, 16384 횞 36, 32768 횞 36 3.3-V CMOS FIRST-IN, FIRST-OUT MEMORIES
SN74ALVC7804 TI-SN74ALVC7804 Datasheet
150Kb / 11P
[Old version datasheet]   512 횞 18 FIRST-IN, FIRST-OUT MEMORY
SN74ALVC7804 TI-SN74ALVC7804_07 Datasheet
241Kb / 13P
[Old version datasheet]   512 횞 18 FIRST-IN, FIRST-OUT MEMORY
SN74ABT7819A TI-SN74ABT7819A Datasheet
321Kb / 21P
[Old version datasheet]   512 횞 18 횞 2 CLOCKED BIDIRECTIONAL FIRST-IN, FIRST-OUT MEMORY
SN54ABT7819 TI-SN54ABT7819 Datasheet
289Kb / 20P
[Old version datasheet]   512 횞 18 횞 2 CLOCKED BIDIRECTIONAL FIRST-IN, FIRST-OUT MEMORY
SN74ABT7820 TI-SN74ABT7820 Datasheet
196Kb / 15P
[Old version datasheet]   512 횞 18 횞 2 STROBED BIDIRECTIONAL FIRST-IN, FIRST-OUT MEMORY
SN74ABT7819 TI-SN74ABT7819 Datasheet
284Kb / 20P
[Old version datasheet]   512 횞 18 횞 2 CLOCKED BIDIRECTIONAL FIRST-IN, FIRST-OUT MEMORY
SN74ACT7804 TI-SN74ACT7804 Datasheet
146Kb / 11P
[Old version datasheet]   512 횞 18 STROBED FIRST-IN, FIRST-OUT MEMORY
SN74ACT7806 TI-SN74ACT7806_06 Datasheet
174Kb / 12P
[Old version datasheet]   256 횞 18 STROBED FIRST-IN, FIRST-OUT MEMORY
SN54ABT7820 TI-SN54ABT7820 Datasheet
199Kb / 14P
[Old version datasheet]   512 횞 18 횞 2 STROBED BIDIRECTIONAL FIRST-IN, FIRST-OUT MEMORY
More results


Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52


датащи скачать

Go To PDF Page


ссылки URL




Конфиденциальность
ALLDATASHEETRU.COM
Вашему бизинису помогли Аллдатащит?  [ DONATE ] 

Что такое Аллдатащит   |   реклама   |   контакт   |   Конфиденциальность   |   обмен ссыками   |   поиск по производителю
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com