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Electrical Characteristics

Timing Requirements

SN74LVCH16374A

16-BIT EDGE-TRIGGERED D-TYPE FLIP-FLOP

WITH 3-STATE OUTPUTS

SCAS757A – DECEMBER 2003 – REVISED OCTOBER 2005

over recommended operating free-air temperature range (unless otherwise noted)

PARAMETER

TEST CONDITIONS

MIN

MAX

UNIT

1.65 V to 3.6 V

1.65 V

1.2

2.3 V

1.7

V

2.7 V

2.2

3 V

2.4

3 V

2.2

1.65 V to 3.6 V

0.2

1.65 V

0.45

2.3 V

0.7

V

2.7 V

0.4

3 V

0.55

3.6 V

±5

µA

(2)

1.65 V

(2)

45

2.3 V

–45

µA

75

3 V

–75

3.6 V

±500

0

±10

µA

3.6 V

±10

µA

20

3.6 V

µA

3.6 V

≤ V

(4)

20

∆I

CC

2.7 V to 3.6 V

500

µA

3.3 V

5

pF

3.3 V

6.5

pF

(1)

(2)

This information was not available at the time of publication.

(3)

This is the bus-hold maximum dynamic current required to switch the input from one state to another.

(4)

This applies in the disabled state only.

over recommended operating free-air temperature range (unless otherwise noted) (see Figure 1)

± 0.15 V

± 0.2 V

± 0.3 V

UNIT

MIN

MAX

MIN

MAX

MIN

MAX

MIN

MAX

Clock frequency

(1)

(1)

150

150

MHz

Pulse duration, CLK high or low

(1)

(1)

3.3

3.3

ns

Setup time, data before CLK

↑

(1)

(1)

1.9

1.9

ns

Hold time, data after CLK

↑

(1)

(1)

1.1

1.1

ns

(1)

This information was not available at the time of publication.

5