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CS5253B-1GDP5 датащи(PDF) 7 Page - ON Semiconductor |
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CS5253B-1GDP5 датащи(HTML) 7 Page - ON Semiconductor |
7 / 10 page CS5253B−1 http://onsemi.com 7 DESIGN GUIDELINES Remote Sense Remote sense operation can be easily obtained with the CS5253B−1 but some care must be paid to the layout and positioning of the filter capacitors around the part. The ground side of the input capacitors on the +5.0 V and +3.3 V lines and the local VOUT−to−ground local output capacitor on the IC output must be tied close to the ground connected resistor voltage divider feedback network. The top resistor of the divider must be connected directly to the VSENSE pin of the regulator. This will establish the stability of the part. This capacitor−divider resistor connection may then be connected to ground remotely at the load, giving the ground portion remote sense operation. The VSENSE line can then be tied remotely at the load connection, giving the feedback remote sense operation. The remote sense lines should be Kelvin connected so as to eliminate the effect of load current voltage drop. An optional bypass capacitor may be used at the load to reduce the effect of load variations and spikes. Figure 19. Remote Sense CS5253B−1 VCONTROL VPOWER VOUT VSENSE ADJ 100 mF +5.0 V +3.3 V +Load Optional GND RDIS RDIS + 10 mF + 33 mF + + Local Connections Remote Connections −Load 124 124 Adjustable Operation This LDO adjustable regulator has an output voltage range of 1.25 V to 5.0 V. An external resistor divider sets the output voltage as shown in Figure 20. The regulator’s voltage sensing error amplifier maintains a fixed 1.25 V reference between the output pin and the adjust pin. Figure 20. Typical Application Schematic. The Resistor Divider Sets VOUT, With the Internal 1.260 V Reference Dropped Across R1. CS5253B−1 VCONTROL VPOWER VOUT VSENSE Adjust R2 R1 5.0 V 3.3 V 2.5 V @ 3.0 A A resistor divider network R1 and R2 causes a fixed current to flow to ground. This current creates a voltage across R2 that adds to the 1.25 V across R1 and sets the overall output voltage. The adjust pin current (typically 50 mA) also flows through R2 and adds a small error that should be taken into account if precise adjustment of VOUT is necessary. The output voltage is set according to the formula: VOUT + 1.25 V R1 ) R2 R1 ) R2 IADJ The term IADJ × R2 represents the error added by the adjust pin current. R1 is chosen so that the minimum load current is at least 10 mA. R1 and R2 should be of the same composition for best tracking overtemperature. While not required, a bypass capacitor connected between the adjust pin and ground will improve transient response and ripple rejection. A 0.1 mF tantalum capacitor is recommended for “first cut” design. Value and type may be varied to optimize performance vs. price. Other Adjustable Operation Considerations The CS5253B−1 linear regulator has an absolute maximum specification of 6.0 V for the voltage difference between VPOWER and VOUT. However, the IC may be used to regulate voltages in excess of 6.0 V. The two main considerations in such a design are the sequencing of power supplies and short circuit capability. Power supply sequencing should be such that the VCONTROL supply is brought up coincidentally with or before the VPOWER supply. This allows the IC to begin charging the output capacitor as soon as the VPOWER to VOUT differential is large enough that the pass transistor conducts. As VPOWER increases, the pass transistor will remain in dropout, and current is passed to the load until |
Аналогичный номер детали - CS5253B-1GDP5 |
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Аналогичное описание - CS5253B-1GDP5 |
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