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CDB4954A датащи(PDF) 6 Page - Cirrus Logic |
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CDB4954A датащи(HTML) 6 Page - Cirrus Logic |
6 / 20 page CDB4954A/55A 6 2.2.2.2 Video Input Source Option This option selects the video source which will serve as input for the CS4954/55. Internal Video means all video content which is supplied by the FPGA. External parallel inputs use J4, the 25 pin D-Sub connector. External serial inputs use J19, the right angle BNC connector. 2.2.2.3 Download a CCIR656 File to SDRAM and Display Option This option downloads a previously converted bit- map file to SDRAM on the evaluation board and displays it on the video outputs. Either a NTSC or a PAL format file may be downloaded and dis- played, but the monitor used must be compatible with the downloaded file format to display correct- ly. 2.2.2.4 Download a CCIR656 File to Flash Option This option downloads and stores a previously con- verted bitmap file to a block of on board Flash memory. FLASH block 1 is contains the Cirrus logo screen in NTSC format, while FLASH block 2 contains the Cirrus logo screen in PAL format. 2.2.2.5 Display Video from Flash Option This option displays video from one of the 3 FLASH blocks. 2.2.2.6 Display Test Patterns Option This option displays one of the eight test patterns generated by the control FPGA. These patterns are color bars, luma bars, step, aqua screen, luma ramp (1 bit/2 pixel ramp rate), luma ramp (1bit/pixel), luma ramp (2bits/pixel), and luma ramp (4bits/pix- el). 3. COMMAND LINE PARAMETERS There are two valid command line parameters which can be used to modify the action of the pro- gram. -f: This parameter shows the FPGA Register Val- ues tab. This allows FPGA registers to be manipu- lated directly. Note that the FPGA Register is NOT part of the CS4954/55. -m: This parameter shows the Macrovision® Reg- isters tabs if a CS4955 is in place on the CDB4954A/55A Evaluation Board. If a CS4954 is in place on the board, the Macrovision Registers tabs are not shown (since the CS4954 doesn’t have Macrovision support) whether or not the "-m" com- mand line parameter is included. 4. 3.3 V OR 5 V INTERFACE The CS4954 allows either 3.3 V or 5 V operation. The CDB4954A/55A evaluation board is built so that you can test this feature by changing jumper configura- tions. The voltage should only be changed when no power is applied. Please refer to Table 1 on page 7. 5. DIGITAL VIDEO INTERFACE The evaluation board is designed to accept the stan- dard ITU-R BT.656 (i.e.: ECL) levels, but it also allows for TTL levels and SMPTE-259M serial digital interface to facilitate system development. Please refer to Table 2 on page 7 for a description of all the connectors located on the board. 6. ANALOG OUTPUT Before connecting equipment such as a monitor to one of the analog video outputs, verify that the jumper configuration for the video connectors are properly set for your application. 7. OUTPUT FILTERS The filters present on the evaluation board are cal- culated for both high impedance loads (doubly ter- minated 300 Ω) and low impedance loads (doubly terminated 75 Ω). Please note that when in low im- pedance mode, only 3 DACs may be enabled. Refer to Table 2 on page 7 for the proper configuration. Also, the CDB4954A/55A evaluation board allows for other filter topologies by providing an extra op- amp with open pads. Please refer to Figure 9 for more detail. |
Аналогичный номер детали - CDB4954A |
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Аналогичное описание - CDB4954A |
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