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SN74GTLP21395DWR датащи(PDF) 6 Page - Texas Instruments |
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SN74GTLP21395DWR датащи(HTML) 6 Page - Texas Instruments |
6 / 21 page SN74GTLP21395 TWO 1-BIT LVTTL-TO-GTLP ADJUSTABLE-EDGE-RATE BUS TRANSCEIVERS WITH SPLIT LVTTL PORT, FEEDBACK PATH, AND SELECTABLE POLARITY SCES350C – JUNE 2001 – REVISED NOVEMBER 2001 6 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 recommended operating conditions (see Notes 4 through 7) MIN NOM MAX UNIT VCC, BIAS VCC Supply voltage 3.15 3.3 3.45 V VTT Termination voltage GTL 1.14 1.2 1.26 V VTT Termination voltage GTLP 1.35 1.5 1.65 V VREF Reference voltage GTL 0.74 0.8 0.87 V VREF Reference voltage GTLP 0.87 1 1.1 V VI Input voltage B port VTT V VI Input voltage Except B port VCC 5.5 V VIH High level input voltage B port VREF+0.05 V VIH High-level input voltage Except B port 2 V VIL Low level input voltage B port VREF–0.05 V VIL Low-level input voltage Except B port 0.8 V IIK Input clamp current –18 mA IOH High-level output current Y outputs –12 mA IOL Low level output current Y outputs 12 mA IOL Low-level output current B port 100 mA ∆t/∆v Input transition rise or fall rate Outputs enabled 10 ns/V ∆t/∆VCC Power-up ramp rate 20 µs/V TA Operating free-air temperature –40 85 °C NOTES: 4. All unused inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report, Implications of Slow or Floating CMOS Inputs, literature number SCBA004. 5. Proper connection sequence for use of the B-port I/O precharge feature is GND and BIAS VCC = 3.3 V first, I/O second, and VCC = 3.3 V last, because the BIAS VCC precharge circuitry is disabled when any VCC pin is connected. The control and VREFinputs can be connected anytime, but normally are connected during the I/O stage. If B-port precharge is not required, any connection sequence is acceptable, but generally, GND is connected first. 6. VTT and RTT can be adjusted to accommodate backplane impedances if the dc recommended IOL ratings are not exceeded. 7. VREF can be adjusted to optimize noise margins, but normally it is two-thirds VTT. TI-OPC is enabled in the A-to-B direction and is activated when VTT > 0.7 V above VREF. If operated in the A-to-B direction, VREF should be set to within 0.6 V of VTT to minimize current drain. |
Аналогичный номер детали - SN74GTLP21395DWR |
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Аналогичное описание - SN74GTLP21395DWR |
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