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MC100ELT22DG датащи(PDF) 1 Page - ON Semiconductor |
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MC100ELT22DG датащи(HTML) 1 Page - ON Semiconductor |
1 / 8 page © Semiconductor Components Industries, LLC, 2006 November, 2006 − Rev. 9 1 Publication Order Number: MC10ELT22/D MC10ELT22, MC100ELT22 5.0 V Dual TTL to Differential PECL Translator The MC10ELT/100ELT22 is a dual TTL to differential PECL translator. Because PECL (Positive ECL) levels are used only +5 V and ground are required. The small outline 8-lead package and the low skew, dual gate design of the ELT22 makes it ideal for applications which require the translation of a clock and a data signal. Features • 1.2 ns Typical Propagation Delay • < 300 ps Typical Output to Output Skew • PNP TTL Inputs for Minimal Loading • Flow Through Pinouts • Operating Range: VCC = 4.75 V to 5.25 V with GND = 0 V • No Internal Input Pulldown Resistors • Pb−Free Packages are Available H = MC10 K = MC100 A = Assembly Location L = Wafer Lot Y = Year W = Work Week G = Pb−Free Package *For additional information, see Application Note AND8002/D. SO−8 D SUFFIX CASE 751 MARKING DIAGRAMS* TSSOP−8 DT SUFFIX CASE 948R 1 8 ALYWG HT22 1 8 ALYWG KT22 1 8 http://onsemi.com See detailed ordering and shipping information in the package dimensions section on page 5 of this data sheet. ORDERING INFORMATION HLT22 ALYW 1 8 KLT22 ALYW 1 8 1 8 G G GG (Note: Microdot may be in either location) |
Аналогичный номер детали - MC100ELT22DG |
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Аналогичное описание - MC100ELT22DG |
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