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MC10E451FNG датащи(PDF) 1 Page - ON Semiconductor

номер детали MC10E451FNG
подробное описание детали  5V ECL 6?묪it D Register Differential Data and Clock
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производитель  ONSEMI [ON Semiconductor]
домашняя страница  http://www.onsemi.com
Logo ONSEMI - ON Semiconductor

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© Semiconductor Components Industries, LLC, 2006
November, 2006 − Rev. 9
1
Publication Order Number:
MC10E451/D
MC10E451, MC100E451
5VECL 6−Bit D Register
Differential Data and Clock
Description
The MC10E/100E451 contains six D−type flip−flops with
single−ended outputs and differential data inputs. The common clock
input is also differential. The registers are triggered by a positive
transition of the positive clock (CLK) input.
A HIGH on the Master Reset (MR) input resets all Q outputs to
LOW.
The differential input structures are clamped so that the inputs of
unused registers can be left open without upsetting the bias network of
the device. The clamping action will assert the D and the CLK sides of
the inputs. Because of the edge triggered flip−flop nature of the device
simultaneously opening both the clock and data inputs will result in an
output which reaches an unidentified but valid state. Note that the
input clamps only operate when both inputs fall to 2.5 V below VCC.
The VBB pin, an internally generated voltage supply, is available to
this device only. For single−ended input conditions, the unused
differential input is connected to VBB as a switching reference voltage.
VBB may also rebias AC coupled inputs. When used, decouple VBB
and VCC via a 0.01 mF capacitor and limit current sourcing or sinking
to 0.5 mA. When not used, VBB should be left open.
The 100 Series contains temperature compensation.
Features
Differential Inputs: Data and Clock
VBB Output
1100 MHz Min. Toggle Frequency
Asynchronous Master Reset
PECL Mode Operating Range:
VCC = 4.2 V to 5.7 V with VEE = 0 V
NECL Mode Operating Range:
VCC = 0 V with VEE = −4.2 V to −5.7 V
Internal Input 50 kW Pulldown Resistors
ESD Protection: Human Body Model; > 2 kV,
Machine Model; > 200 V
Transistor Count = 348 devices
Meets or Exceeds JEDEC Spec EIA/JESD78 IC
Latchup Test
Flammability Rating: UL 94 V−0 @ 0.125 in,
Oxygen Index: 28 to 34
Moisture Sensitivity Level:
Pb = 1;
Pb−Free = 3
For Additional Information, see Application Note
AND8003/D
Pb−Free Packages are Available*
*For additional information on our Pb−Free strategy and soldering details, please
download the ON Semiconductor Soldering and Mounting Techniques
Reference Manual, SOLDERRM/D.
MARKING DIAGRAM*
xxx
= 10 or 100
A
= Assembly Location
WL
= Wafer Lot
YY
= Year
WW
= Work Week
G
= Pb−Free Package
PLCC−28
FN SUFFIX
CASE 776
http://onsemi.com
*For additional marking information, refer to
Application Note AND8002/D.
See detailed ordering and shipping information in the package
dimensions section on page 7 of this data sheet.
ORDERING INFORMATION
MCxxxE451FNG
AWLYYWW
128


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