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CAT25160VI-GT3 датащи(PDF) 5 Page - Catalyst Semiconductor

номер детали CAT25160VI-GT3
подробное описание детали  8-Kb and 16-Kb SPI Serial CMOS EEPROM
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производитель  CATALYST [Catalyst Semiconductor]
домашняя страница  http://www.catalyst-semiconductor.com
Logo CATALYST - Catalyst Semiconductor

CAT25160VI-GT3 датащи(HTML) 5 Page - Catalyst Semiconductor

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CAT25080, CAT25160
© 2006 Catalyst Semiconductor, Inc.
5
Doc. No. 1122 Rev. A
Characteristics subject to change without notice
STATUS REGISTER
The Status Register, as shown in Table 2, contains a
number of status and control bits.
The RDY
¯¯¯¯ (Ready) bit indicates whether the device is
busy with a write operation. This bit is automatically set
to 1 during an internal write cycle, and reset to 0 when
the device is ready to accept commands. For the host,
this bit is read only.
The WEL (Write Enable Latch) bit is set/reset by the
WREN/WRDI commands. When set to 1, the device is
in a Write Enable state and when set to 0, the device is
in a Write Disable state.
The BP0 and BP1 (Block Protect) bits determine which
blocks are currently write protected. They are set by the
user with the WRSR command and are non-volatile.
The user is allowed to protect a quarter, one half or the
entire memory, by setting these bits according to Table
3. The protected blocks then become read-only.
The WPEN (Write Protect Enable) bit acts as an enable
for the WP
¯¯¯ pin. Hardware write protection is enabled
when the WP
¯¯¯ pin is low and the WPEN bit is 1. This
condition prevents writing to the status register and to
the block protected sections of memory. While
hardware write protection is active, only the non-block
protected memory can be written. Hardware write
protection is disabled when the WP
¯¯¯ pin is high or the
WPEN bit is 0. The WPEN bit, WP
¯¯¯ pin and WEL bit
combine to either permit or inhibit Write operations, as
detailed in Table 4.
Table 2. Status Register
7
6
5
4
3
2
1
0
WPEN
0
0
0
BP1
BP0
WEL
RDY
¯¯¯¯
Table 3. Block Protection Bits
Status Register Bits
BP1
BP0
Array Address Protected
Protection
0
0
None
No Protection
25080: 0300-03FF
0
1
25160: 0600-07FF
Quarter Array Protection
25080: 0200-03FF
1
0
25160: 0400-07FF
Half Array Protection
25080: 0000-03FF
1
1
25160: 0000-07FF
Full Array Protection
Table 4. Write Protect Conditions
WPEN
WP
¯¯¯
WEL
Protected
Blocks
Unprotected
Blocks
Status
Register
0
X
0
Protected
Protected
Protected
0
X
1
Protected
Writable
Writable
1
Low
0
Protected
Protected
Protected
1
Low
1
Protected
Writable
Protected
X
High
0
Protected
Protected
Protected
X
High
1
Protected
Writable
Writable


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