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MC10LVEL40DW датащи(PDF) 5 Page - ON Semiconductor

номер детали MC10LVEL40DW
подробное описание детали  3.3/5V ECL Differential Phase?묯requency Detector
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производитель  ONSEMI [ON Semiconductor]
домашняя страница  http://www.onsemi.com
Logo ONSEMI - ON Semiconductor

MC10LVEL40DW датащи(HTML) 5 Page - ON Semiconductor

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MC100LVEL40
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Figure 3. Typical Termination for Output Driver and Device Evaluation
(See Application Note AND8020/D − Termination of ECL Logic Devices.)
Driver
Device
Receiver
Device
QD
Q
D
Zo = 50 W
Zo = 50 W
50 W
50 W
VTT
VTT = VCC − 2.0 V
ORDERING INFORMATION
Device
Package
Shipping
MC10LVEL40DW
SOIC−20
38 Units / Rail
MC10LVEL40DWG
SOIC−20
(Pb−Free)
38 Units / Rail
MC10LVEL40DWR2
SOIC−20
1000 / Tape & Reel
MC10LVEL40DWR2G
SOIC−20
(Pb−Free)
1000 / Tape & Reel
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
Resource Reference of Application Notes
AN1405/D
− ECL Clock Distribution Techniques
AN1406/D
− Designing with PECL (ECL at +5.0 V)
AN1503/D
− ECLinPSt I/O SPiCE Modeling Kit
AN1504/D
− Metastability and the ECLinPS Family
AN1568/D
− Interfacing Between LVDS and ECL
AN1672/D
− The ECL Translator Guide
AND8001/D − Odd Number Counters Design
AND8002/D − Marking and Date Codes
AND8020/D − Termination of ECL Logic Devices
AND8066/D − Interfacing with ECLinPS
AND8090/D − AC Characteristics of ECL Devices


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