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CAT25C256X-1.8T3 датащи(PDF) 9 Page - Catalyst Semiconductor

номер детали CAT25C256X-1.8T3
подробное описание детали  128K/256K-Bit SPI Serial CMOS EEPROM
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производитель  CATALYST [Catalyst Semiconductor]
домашняя страница  http://www.catalyst-semiconductor.com
Logo CATALYST - Catalyst Semiconductor

CAT25C256X-1.8T3 датащи(HTML) 9 Page - Catalyst Semiconductor

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CAT25C128/256
Document No. 1018, Rev. I
address counter reaches the end of the page and clock
continues, the counter will “roll over” to the first address
of the page and overwrite any data that may have been
written. The CAT25C128/256 is automatically returned
to the write disable state at the completion of the write
cycle. Figure 8 illustrates the page write sequence.
To write to the status register, the WRSR instruction
should be sent. Only Bit 2, Bit 3 and Bit 7 of the status
register can be written using the WRSR instruction.
Figure 7 illustrates the sequence of writing to status
register.
The Status Register can be read to determine if the write
cycle is still in progress. If Bit 0 of the Status Register is
set at 1, write cycle is in progress. If Bit 0 is set at 0, the
device is ready for the next instruction.
Page Write
The CAT25C128/256 features page write capability.
After the first initial byte the host may continue to write
up to 64 bytes of data to the CAT25C128/256. After
each byte of data is received, six lower order address
bits are internally incremented by one; the high order
bits of address will remain constant. The only restriction
is that the 64 bytes must reside on the same page. If the
SK
SI
SO
0
0
0
0
0
0
1
0
ADDRESS
D7
D6
D5
D4
D3
D2
D1
D0
012345678
21
22
23
24
25
26
27
28
29
30
3
CS
OPCODE
DATA IN
HIGH IMPEDANCE
Note: Dashed Line= mode (1, 1) — ———
Figure 6. Write Instruction Timing
Figure 7. WRSR Timing
0
1
2
345
67
8
10
911
12
13
14
SCK
SI
MSB
HIGH IMPEDANCE
DATA IN
15
SO
CS
7
6
5
4
3
2
10
00
0
00
0
0
1
OPCODE
Note: Dashed Line= mode (1, 1) — ———
Figure 8. Page Write Instruction Timing
SK
SI
SO
0
0
0
0
0
0
1
0
ADDRESS
Data
Byte 1
012345678
21
22
23 24-31
32-39
Data
Byte 2
Data
Byte 3
Data Byte N
CS
OPCODE
7..1
0
24+(N-1)x8-1..24+(N-1)x8 24+Nx8-1
DATA IN
HIGH IMPEDANCE
Note: Dashed Line= mode (1, 1) — ———


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