REV. F

AD8038/AD8039

–11–

OUTLINE DIMENSIONS

5-Lead Thin Shrink Small Outline Transistor Package [SC70]

(KS-5)

Dimensions shown in millimeters

0.30

0.15

1.00

0.90

0.70

SEATING

PLANE

1.10 MAX

0.22

0.08

0.46

0.36

0.26

3

5

4

1

2

2.00 BSC

PIN 1

2.10 BSC

0.65 BSC

1.25 BSC

0.10 MAX

0.10 COPLANARITY

COMPLIANT TO JEDEC STANDARDS MO-203AA

8-Lead Small Outline Transistor Package [SOT-23]

(RT-8)

Dimensions shown in millimeters

1

3

5

6

2

8

4

7

2.90 BSC

1.60 BSC

1.95

BSC

0.65 BSC

0.38

0.22

0.15 MAX

1.30

1.15

0.90

SEATING

PLANE

1.45 MAX

0.22

0.08

0.60

0.45

0.30

8

4

0

2.80 BSC

PIN 1

INDICATOR

COMPLIANT TO JEDEC STANDARDS MO-178BA

8-Lead Standard Small Outline Package [SOIC]

(R-8)

Dimensions shown in millimeters and (inches)

0.25 (0.0098)

0.17 (0.0067)

1.27 (0.0500)

0.40 (0.0157)

0.50 (0.0196)

0.25 (0.0099)

45

8

0

1.75 (0.0688)

1.35 (0.0532)

SEATING

PLANE

0.25 (0.0098)

0.10 (0.0040)

85

4

1

5.00 (0.1968)

4.80 (0.1890)

4.00 (0.1574)

3.80 (0.1497)

1.27 (0.0500)

BSC

6.20 (0.2440)

5.80 (0.2284)

0.51 (0.0201)

0.31 (0.0122)

COPLANARITY

0.10

CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS

(IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR

REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN

COMPLIANT TO JEDEC STANDARDS MS-012AA