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SN74AUC1G125DBVR датащи(PDF) 2 Page - Texas Instruments |
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SN74AUC1G125DBVR датащи(HTML) 2 Page - Texas Instruments |
2 / 12 page www.ti.com DESCRIPTION/ORDERING INFORMATION (CONTINUED) A Y OE 1 2 4 Absolute Maximum Ratings (1) SN74AUC1G125 SINGLE BUS BUFFER GATE WITH 3-STATE OUTPUT SCES382K – MARCH 2002 – REVISED APRIL 2007 This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down. FUNCTION TABLE INPUTS OUTPUT Y OE A L H H L L L H X Z LOGIC DIAGRAM (POSITIVE LOGIC) over operating free-air temperature range (unless otherwise noted) MIN MAX UNIT VCC Supply voltage range –0.5 3.6 V VI Input voltage range(2) –0.5 3.6 V VO Voltage range applied to any output in the high-impedance or power-off state(2) –0.5 3.6 V VO Output voltage range(2) –0.5 VCC + 0.5 V IIK Input clamp current VI < 0 –50 mA IOK Output clamp current VO < 0 –50 mA IO Continuous output current ±20 mA Continuous current through VCC or GND ±100 mA DBV package 206 DCK package 252 θ JA Package thermal impedance(3) °C/W DRY package 234 YZP package 132 Tstg Storage temperature range –65 150 °C (1) Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. (2) The input negative-voltage and output voltage ratings may be exceeded if the input and output current ratings are observed. (3) The package thermal impedance is calculated in accordance with JESD 51-7. 2 Submit Documentation Feedback |
Аналогичный номер детали - SN74AUC1G125DBVR |
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Аналогичное описание - SN74AUC1G125DBVR |
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