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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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AM29BDS320GBD4VMI датащи(PDF) 33 Page - SPANSION |
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AM29BDS320GBD4VMI датащи(HTML) 33 Page - SPANSION |
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33 / 74 page  October 1, 2003 27243B1 Am29BDS320G 31 Prelimin ary Table 13. Device IDs The system must write the reset command to return to the read mode (or erase- suspend-read mode if the bank was previously in Erase Suspend). Program Command Sequence Programming is a four-bus-cycle operation. The program command sequence is initiated by writing two unlock write cycles, followed by the program set-up com- mand. The program address and data are written next, which in turn initiate the Embedded Program algorithm. The system is not required to provide further con- trols or timings. The device automatically provides internally generated program pulses and verifies the programmed cell margin. Table 14 shows the address and data requirements for the program command sequence. When the Embedded Program algorithm is complete, that bank then returns to the read mode and addresses are no longer latched. The system can determine the status of the program operation by monitoring DQ7 or DQ6/DQ2. Refer to the “Write Operation Status” section on page 37 section for information on these sta- tus bits. Any commands written to the device during the Embedded Program Algorithm are ignored. Note that a hardware reset immediately terminates the program op- eration. The program command sequence should be reinitiated once that bank has returned to the read mode, to ensure data integrity. Programming is allowed in any sequence and across sector boundaries. A bit can- not be programmed from “0” back to a “1.” Attempting to do so may cause that bank to set DQ5 = 1, or cause the DQ7 and DQ6 status bit to indicate the oper- ation was successful. However, a succeeding read will show that the data is still “0.” Only erase operations can convert a “0” to a “1.” Unlock Bypass Command Sequence The unlock bypass feature allows the system to primarily program to a bank faster than using the standard program command sequence. The unlock bypass command sequence is initiated by first writing two unlock cycles. This is followed by a third write cycle containing the unlock bypass command, 20h. That bank then enters the unlock bypass mode. A two-cycle unlock bypass program com- mand sequence is all that is required to program in this mode. The first cycle in this sequence contains the unlock bypass program command, A0h; the second cycle contains the program address and data. Additional data is programmed in Description Address Read Data Manufacturer ID (BA) + 00h 0001h Device ID, Word 1 (BA) + 01h 227Eh Device ID, Word 2 (BA) + 0Eh 2222h (1.8 V VIO, top boot), 2223h (1.8 V VIO, bottom boot), 2214h (3.0 V VIO, top boot), 2234h (3.0 V VIO, bottom boot) Device ID, Word 3 (BA) + 0Fh 2200h Sector Block Lock/Unlock (SA) + 02h 0001 (locked), 0000 (unlocked) Handshaking (BA) + 03h 43h (reduced wait-state), 42h (standard) |
Аналогичный номер детали - AM29BDS320GBD4VMI |
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Аналогичное описание - AM29BDS320GBD4VMI |
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