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AM75PDL191CHH датащи(PDF) 11 Page - SPANSION

номер детали AM75PDL191CHH
подробное описание детали  128 Megabit (8 M x 16-Bit) CMOS 3.0 Volt-only, Simultaneous Read/Write Flash Memory
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February 5, 2004
Am75PDL191CHH/Am75PDL193CHH
9
ADV ANCE
I N FO RMAT I O N
ESD Immunity . . . . . . . . . . . . . . . . . . . . . . . . . . . . 62
DC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . 64
Test Conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . 65
Figure 10. Test Setup..................................................................... 65
Figure 11. Input Waveforms and Measurement Levels .................. 65
pSRAM AC Characteristics . . . . . . . . . . . . . . . . . 66
CE#1ps Timing ....................................................................... 66
Figure 12. Timing Diagram for Alternating
Between Pseudo SRAM and Flash................................................. 66
AC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . 67
Read-Only Operations – Am29PDL127H ............................... 67
Read-Only Operations – Am29PDL129H ............................... 67
Figure 13. Read Operation Timings ................................................ 68
Figure 14. Page Read Operation Timings....................................... 68
Hardware Reset (RESET#) .................................................... 69
Figure 15. Reset Timings ................................................................ 69
Erase and Program Operations .............................................. 70
Figure 16. Program Operation Timings........................................... 71
Figure 17. Accelerated Program Timing Diagram........................... 71
Figure 18. Chip/Sector Erase Operation Timings ........................... 72
Figure 19. Back-to-back Read/Write Cycle Timings ....................... 73
Figure 20. Data# Polling Timings (During Embedded Algorithms).. 73
Figure 21. Toggle Bit Timings (During Embedded Algorithms)....... 74
Figure 22. DQ2 vs. DQ6.................................................................. 74
Temporary Sector Unprotect .................................................. 75
Figure 23. Temporary Sector Unprotect Timing Diagram ............... 75
Figure 24. Sector/Sector Block Protect and
Unprotect Timing Diagram .............................................................. 76
Alternate CE# Controlled Erase and Program Operations ..... 77
Figure 25. Flash Alternate CE# Controlled Write (Erase/Program)
Operation Timings........................................................................... 78
Erase And Programming Performance . . . . . . . . 79
Latchup Characteristics . . . . . . . . . . . . . . . . . . . 79
Package Pin Capacitance . . . . . . . . . . . . . . . . . . 79
Flash Data Retention . . . . . . . . . . . . . . . . . . . . . . 79
Device Bus Operations . . . . . . . . . . . . . . . . . . . . . 80
Table 1. Am29DL640H Device Bus Operations ..............................80
Word/Byte Configuration ........................................................ 80
Requirements for Reading Array Data ................................... 80
Writing Commands/Command Sequences ............................ 81
Accelerated Program Operation .......................................... 81
Autoselect Functions ........................................................... 81
Simultaneous Read/Write Operations with Zero Latency ....... 81
Standby Mode ........................................................................ 81
Automatic Sleep Mode ........................................................... 81
RESET#: Hardware Reset Pin ............................................... 82
Output Disable Mode .............................................................. 82
Table 2. Am29DL640H Sector Architecture ....................................82
Table 3. Bank Address ....................................................................85
SecSi
TM Sector Addresses.............................................................. 85
Autoselect Mode ..................................................................... 85
Sector/Sector Block Protection and Unprotection .................. 87
Table 5. Am29DL640H Boot Sector/Sector Block Addresses for Pro-
tection/Unprotection ........................................................................87
Write Protect (WP#) ................................................................ 87
Table 6. WP#/ACC Modes ..............................................................88
Temporary Sector Unprotect .................................................. 88
Figure 1. Temporary Sector Unprotect Operation........................... 88
Figure 2. In-System Sector Protect/Unprotect Algorithms .............. 89
SecSi™ (Secured Silicon) Sector
Flash Memory Region ............................................................. 90
Figure 3. SecSi Sector Protect Verify............................................. 91
Hardware Data Protection ...................................................... 91
Low VCC Write Inhibit ......................................................... 91
Write Pulse “Glitch” Protection ............................................ 91
Logical Inhibit ....................................................................... 91
Power-Up Write Inhibit ......................................................... 91
Common Flash Memory Interface (CFI) . . . . . . . 91
Table 7. CFI Query Identification String .......................................... 92
System Interface String................................................................... 92
Table 9. Device Geometry Definition .............................................. 93
Table 10. Primary Vendor-Specific Extended Query ...................... 94
Command Definitions . . . . . . . . . . . . . . . . . . . . . 95
Reading Array Data ................................................................ 95
Reset Command ..................................................................... 95
Autoselect Command Sequence ............................................ 95
Enter SecSi™ Sector/Exit SecSi Sector
Command Sequence .............................................................. 95
Word Program Command Sequence ...................................... 96
Unlock Bypass Command Sequence .................................. 96
Figure 4. Program Operation ......................................................... 97
Chip Erase Command Sequence ........................................... 97
Sector Erase Command Sequence ........................................ 97
Figure 5. Erase Operation.............................................................. 98
Erase Suspend/Erase Resume Commands ........................... 98
Table 11. Am29DL640H Command Definitions .............................. 99
Write Operation Status . . . . . . . . . . . . . . . . . . . 100
DQ7: Data# Polling ............................................................... 100
Figure 6. Data# Polling Algorithm ................................................ 100
RY/BY#: Ready/Busy# .......................................................... 101
DQ6: Toggle Bit I .................................................................. 101
Figure 7. Toggle Bit Algorithm...................................................... 101
DQ2: Toggle Bit II ................................................................. 102
Reading Toggle Bits DQ6/DQ2 ............................................. 102
DQ5: Exceeded Timing Limits .............................................. 102
DQ3: Sector Erase Timer ..................................................... 102
Table 12. Write Operation Status ................................................. 103
Absolute Maximum Ratings . . . . . . . . . . . . . . . 104
Figure 8. Maximum Negative Overshoot Waveform .................... 104
Figure 9. Maximum Positive Overshoot Waveform...................... 104
DC Characteristics . . . . . . . . . . . . . . . . . . . . . . . 105
Figure 10. I
CC1 Current vs. Time (Showing Active and
Automatic Sleep Currents) ........................................................... 106
Figure 11. Typical I
CC1 vs. Frequency .......................................... 106
Test Conditions . . . . . . . . . . . . . . . . . . . . . . . . . 107
Figure 12. Test Setup.................................................................. 107
Figure 13. Input Waveforms and Measurement Levels ............... 107
AC Characteristics . . . . . . . . . . . . . . . . . . . . . . . 108
Read-Only Operations ......................................................... 108
Figure 14. Read Operation Timings ............................................. 108
Hardware Reset (RESET#) .................................................. 109
Figure 15. Reset Timings ............................................................. 109
Erase and Program Operations ............................................ 110
Figure 16. Program Operation Timings........................................ 111
Figure 17. Accelerated Program Timing Diagram ........................ 111
Figure 18. Chip/Sector Erase Operation Timings ........................ 112
Figure 19. Back-to-back Read/Write Cycle Timings .................... 113
Figure 20. Data# Polling Timings (During Embedded Algorithms) 113
Figure 21. Toggle Bit Timings (During Embedded Algorithms).... 114
Figure 22. DQ2 vs. DQ6............................................................... 114


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Аналогичное описание - AM75PDL191CHH

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