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74LVQ125 датащи(PDF) 1 Page - Fairchild Semiconductor |
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74LVQ125 датащи(HTML) 1 Page - Fairchild Semiconductor |
1 / 5 page © 2001 Fairchild Semiconductor Corporation DS011349 www.fairchildsemi.com February 1992 Revised June 2001 74LVQ125 Low Voltage Quad Buffer with 3-STATE Outputs General Description The LVQ125 contains four independent non-inverting buff- ers with 3-STATE outputs. Features s Ideal for low power/low noise 3.3V applications s Guaranteed simultaneous switching noise level and dynamic threshold performance s Guaranteed pin-to-pin skew AC performance s Guaranteed incident wave switching into 75 Ω Ordering Code: Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code. Logic Symbol IEEE/IEC Pin Descriptions Connection Diagram Truth Table H = HIGH Voltage Level L = LOW Voltage Level Z = HIGH Impedance X = Immaterial Order Number Package Number Package Description 74LVQ125SC M14A 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow 74LVQ125SJ M14D 14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide Pin Names Description An, Bn Inputs On Outputs Inputs Output An Bn On L L L L H H H X Z |
Аналогичный номер детали - 74LVQ125 |
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Аналогичное описание - 74LVQ125 |
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