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ISL54058 датащи(PDF) 7 Page - Intersil Corporation

номер детали ISL54058
подробное описание детали  Ultra Low ON-Resistance, Low-Voltage, Single Supply, Dual 4 to 1 Analog Multiplexer
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производитель  INTERSIL [Intersil Corporation]
домашняя страница  http://www.intersil.com/cda/home
Logo INTERSIL - Intersil Corporation

ISL54058 датащи(HTML) 7 Page - Intersil Corporation

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FN6380.0
September 29, 2006
If these conditions cannot be guaranteed, then precautions
must be implemented to prohibit the current and voltage at
the logic pin and signal pins from exceeding the maximum
ratings of the switch. The following two methods can be used
to provided additional protection to limit the current in the
event that the voltage at a signal pin or logic pin goes below
ground or above the V+ rail.
Logic inputs can be protected by adding a 1k
Ω resistor in
series with the logic input (see Figure 7). The resistor limits
the input current below the threshold that produces
permanent damage, and the sub-microamp input current
produces an insignificant voltage drop during normal
operation.
This method is not acceptable for the signal path inputs.
Adding a series resistor to the switch input defeats the
purpose of using a low RON switch. Connecting schottky
diodes to the signal pins as shown in Figure 7 will shunt the
fault current to the supply or to ground thereby protecting the
switch. These schottky diodes must be sized to handle the
expected fault current.
Power-Supply Considerations
The ISL54058 construction is typical of most CMOS analog
switches, in that they have two supply pins: V+ and GND. V+
and GND drive the internal CMOS switches and set their
analog voltage limits. Unlike switches with a 4V maximum
supply voltage, the ISL54058 4.7V maximum supply voltage
provides plenty of room for the 10% tolerance of 3.6V
supplies, as well as room for overshoot and noise spikes.
The minimum recommended supply voltage is 1.6V but the
part will operate with a supply below 1.5V. It is important to
note that the input signal range, switching times, and
on-resistance degrade at lower supply voltages. Refer to the
electrical specification tables and Typical Performance
curves for details.
V+ and GND power the internal logic (thus setting the digital
switching point) and level shifters. The level shifters convert
the logic levels to switched V+ and V- signals to drive the
analog switch gate terminals.
Logic-Level Thresholds
This device is 1.8V CMOS compatible (0.5V and 1.4V) over
a supply range of 2.7V to 3.6V. At 2.7V the VIL level is about
0.54V. This is still above the 1.8V CMOS guaranteed low
output maximum level of 0.5V but noise margin is reduced.
The digital input stages draw supply current whenever the
digital input voltage is not at one of the supply rails. Driving
the digital input signals from GND to V+ with a fast transition
time minimizes power dissipation.
High-Frequency Performance
In 50
Ω systems, signal response is reasonably flat even past
10MHz with a -3dB bandwidth of 70MHz (see Figure 12).
The frequency response is very consistent over a wide V+
range, and for varying analog signal levels.
An OFF switch acts like a capacitor and passes higher
frequencies with less attenuation, resulting in signal feed
through from a switch’s input to its output. Off Isolation is the
resistance to this feed through, while Crosstalk indicates the
amount of feed through from one switch to another.
Figure 11 details the high Off Isolation and Crosstalk
rejection provided by this family. At 100kHz, Off Isolation is
about 65dB in 50
Ω systems, decreasing approximately 20dB
per decade as frequency increases. Higher load
impedances decrease Off Isolation and Crosstalk rejection
due to the voltage divider action of the switch OFF
impedance and the load impedance.
Leakage Considerations
Reverse ESD protection diodes are internally connected
between each analog-signal pin and both V+ and GND.
One of these diodes conducts if any analog signal exceeds
V+ or GND.
Virtually all the analog leakage current comes from the ESD
diodes to V+ or GND. Although the ESD diodes on a given
signal pin are identical and therefore fairly well balanced,
they are reverse biased differently. Each is biased by either
V+ or GND and the analog signal. This means their leakages
will vary as the signal varies. The difference in the two diode
leakages to the V+ and GND pins constitutes the analog-
signal-path leakage current. All analog leakage current flows
between each pin and one of the supply terminals, not to the
other switch terminal. This is why both sides of a given
switch can show leakage currents of the same or opposite
polarity. There is no connection between the analog signal
paths and V+ or GND.
ISL54058


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